Methods and systems for process compensation technique acceleration
    1.
    发明授权
    Methods and systems for process compensation technique acceleration 有权
    过程补偿技术加速的方法和系统

    公开(公告)号:US08286107B2

    公开(公告)日:2012-10-09

    申请号:US12340406

    申请日:2008-12-19

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5068 G03F1/36

    摘要: Selected cells in a semiconductor chip layout are replaced with corresponding PCT pre-processed cells. Each PCT pre-processed cell represents a particular selected cell having been previously subjected to a cell-level-PCT-processing operation so as to include PCT-based cell layout adjustments. Following replacement of the selected cells in the semiconductor chip layout with corresponding PCT pre-processed cells, a chip-wide PCT processing operation is performed on the semiconductor chip layout for a given chip level. The presence of the PCT pre-processed cells in the semiconductor chip layout serves to accelerate the chip-wide PCT processing of the semiconductor chip layout. The chip-wide PCT processed semiconductor layout for the given chip level is recorded on a persistent storage medium.

    摘要翻译: 半导体芯片布局中的选定单元被相应的PCT预处理单元替换。 每个PCT预处理小区表示先前已经进行细胞级PCT处理操作的特定选择的细胞,以便包括基于PCT的细胞布局调整。 在用相应的PCT预处理单元替换半导体芯片布局中的所选单元之后,针对给定的芯片级对半导体芯片布局执行芯片宽的PCT处理操作。 半导体芯片布局中的PCT预处理电池的存在用于加速半导体芯片布局的芯片宽的PCT处理。 用于给定芯片级的芯片宽的PCT处理的半导体布局被记录在永久存储介质上。

    Methods and Systems for Process Compensation Technique Acceleration
    2.
    发明申请
    Methods and Systems for Process Compensation Technique Acceleration 有权
    过程补偿技术加速方法与系统

    公开(公告)号:US20090100396A1

    公开(公告)日:2009-04-16

    申请号:US12340406

    申请日:2008-12-19

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5068 G03F1/36

    摘要: Selected cells in a semiconductor chip layout are replaced with corresponding PCT pre-processed cells. Each PCT pre-processed cell represents a particular selected cell having been previously subjected to a cell-level-PCT-processing operation so as to include PCT-based cell layout adjustments. Following replacement of the selected cells in the semiconductor chip layout with corresponding PCT pre-processed cells, a chip-wide PCT processing operation is performed on the semiconductor chip layout for a given chip level. The presence of the PCT pre-processed cells in the semiconductor chip layout serves to accelerate the chip-wide PCT processing of the semiconductor chip layout. The chip-wide PCT processed semiconductor layout for the given chip level is recorded on a persistent storage medium.

    摘要翻译: 半导体芯片布局中的选定单元被相应的PCT预处理单元替换。 每个PCT预处理小区表示先前已经进行细胞级PCT处理操作的特定选择的细胞,以便包括基于PCT的细胞布局调整。 在用相应的PCT预处理单元替换半导体芯片布局中的所选单元之后,针对给定的芯片级对半导体芯片布局执行芯片宽的PCT处理操作。 半导体芯片布局中的PCT预处理电池的存在用于加速半导体芯片布局的芯片宽的PCT处理。 用于给定芯片级的芯片宽的PCT处理的半导体布局被记录在永久存储介质上。