Double heterostructure step recovery diode with internal drift field
    2.
    发明授权
    Double heterostructure step recovery diode with internal drift field 失效
    具有内部漂移场的双异质结阶梯恢复二极管

    公开(公告)号:US5148267A

    公开(公告)日:1992-09-15

    申请号:US708950

    申请日:1991-05-31

    CPC分类号: H01L29/868 H01L29/155

    摘要: A double heterostructure step recovery diode having a very fast step transition time and a high output voltage. A highly doped, wide bandgap p-type region; a narrow bandgap intrinsic region; and a highly doped, wide bandgap n-type region define a PIN diode structure. The intrinsic region forms heterojunctions with the p and n regions. Highly doped, narrow bandgap p and n contact regions adjoin the wide bandgap p and n regions, respectively and form heterojunctions therewith. Very thin, highly doped, narrow bandgap p and n regions are located between the intrinsic region and the wide bandgap p and n regions, respectively. Optional graded bandgap p-type and n-type regions are located between the wide and narrow bandgap p and n regions. In one embodiment the diode is embedded in an undoped wide bandgap material. In an alternate version, the intrinsic region is replaced with a lightly-doped p-type charge storage region to reduce the slow tail portion of the step recovery. An electric field, generated by a graded doping level or a graded bandgap structure, also reduces the slow tail.

    摘要翻译: 具有非常快的阶梯转换时间和高输出电压的双异质结构阶梯恢复二极管。 高掺杂的宽带隙p型区域; 窄带隙内在区域; 并且高掺杂的宽带隙n型区限定PIN二极管结构。 本征区域与p区和n区形成异质结。 高掺杂,窄带隙p和n接触区分别与宽带隙p和n区相邻,并与其形成异质结。 非常薄的,高掺杂的窄带隙p和n区分别位于本征区和宽带隙p和n区之间。 可选的分级带隙p型和n型区位于宽带和窄带p和n区之间。 在一个实施例中,二极管嵌入未掺杂的宽带隙材料中。 在替代版本中,本征区域被轻掺杂的p型电荷存储区域代替,以减少步骤恢复的慢尾部分。 由渐变掺杂级别或渐变带隙结构产生的电场也减少了慢尾。

    Monolithic sampler
    3.
    发明授权
    Monolithic sampler 失效
    单片取样器

    公开(公告)号:US4956568A

    公开(公告)日:1990-09-11

    申请号:US281423

    申请日:1988-12-08

    IPC分类号: G01R13/34 G01R19/00 G11C27/02

    CPC分类号: G11C27/024

    摘要: A Monolithic Sampler is disclosed. The present invention overcomes the problem of inadequately low sampling rates that results from circuit designs or component limitations that constrain the bandwidths of previous instruments. The sampler includes five circuit stages: a local oscillator section that may be used to drive the system, a shock wave generator that produces high frequency edge-sharpened pulses, a reflection damping clamping section, a delay section, and a sampler section regulated by the stream of shock waves which produces an IF output. The local oscillator or a pulse generator (not shown) produces an input that propagates down a nonlinear transmission line. Once this input reaches the shock wave generator section, it encounters a series of hyperabrupt diodes which are employed as voltage dependent capacitors called varactors. These varactors deform the input pulses and generate a stream of spike-shaped waveforms known as shock waves. The shock waves successively energize sampling diodes in the sampling section of the circuit. When these diodes are energized, they open pathways from an RF input to sampling capacitors which charge up with small representative bits of current from the input. A sample or snapshot of the input is drawn from these capacitors through an IF output coupling network. The clamping and delay sections of the sampler minimize spurious ringing throughout the circuit and manage the timing of the oscillation of these reflections. The entire sampler is monolithically integrated on a single substrate using conventional semiconductor fabrication and packaging techniques.