摘要:
An indication of a change to at least one source file associated with a software build is received via a processor. A set of test levels of a level-based testing suite are sequentially processed, where each test level subsequently processed includes tests with decreasing qualitative testing information relative to tests associated with previously-processed test levels. For each processed test level, at least one test is selected that tests the change to the at least one source file associated with the software build, test coverage relative to a target risk level for the software build is determined for each selected test, and test selection is terminated upon determining that the test coverage for the selected tests at least meets the target risk level for the software build.
摘要:
An indication of a change to at least one source file associated with a software build is received via a processor. A set of test levels of a level-based testing suite are sequentially processed, where each test level subsequently processed includes tests with decreasing qualitative testing information relative to tests associated with previously-processed test levels. For each processed test level, at least one test is selected that tests the change to the at least one source file associated with the software build, test coverage relative to a target risk level for the software build is determined for each selected test, and test selection is terminated upon determining that the test coverage for the selected tests at least meets the target risk level for the software build.
摘要:
An indication of a change to at least one source file associated with a software build is received via a processor. A set of test levels of a level-based testing suite are sequentially processed, where each test level subsequently processed includes tests with decreasing qualitative testing information relative to tests associated with previously-processed test levels. For each processed test level, at least one test is selected that tests the change to the at least one source file associated with the software build, test coverage relative to a target risk level for the software build is determined for each selected test, and test selection is terminated upon determining that the test coverage for the selected tests at least meets the target risk level for the software build.
摘要:
An indication of a change to at least one source file associated with a software build is received via a processor. A set of test levels of a level-based testing suite are sequentially processed, where each test level subsequently processed includes tests with decreasing qualitative testing information relative to tests associated with previously-processed test levels. For each processed test level, at least one test is selected that tests the change to the at least one source file associated with the software build, test coverage relative to a target risk level for the software build is determined for each selected test, and test selection is terminated upon determining that the test coverage for the selected tests at least meets the target risk level for the software build.
摘要:
A memory and method for operating it provide for increased data access speed. In an implementation, a synchronous memory or SDRAM includes a central memory region with memory blocks arranged in sets on respective opposite sides. A number of primary sense amplifier sets are provided, each set being associated with a respective set of the memory blocks and located adjacent. A row cache is provided in the central memory region, and row decoders decode a row address in response to a “bank activate” command and move data from a decoded row address into a primary sense amplifier set associated with a memory block containing the decoded row address and into the row cache, before application of a “read” command to the SDRAM. Column decoders decode a column address in response to a “read” command and for reading data from the cache in accordance with the decoded column address.
摘要:
An SDRAM and method for operating it provide for increased data access speed. The SDRAM includes a central memory region with memory blocks arranged in sets on respective opposite sides. A plurality of primary sense amplifier sets are provided, each set being associated with a respective set of the memory blocks and located adjacent thereto. A row cache is provided in the central memory region, and row decoders decode a row address in response to a “bank activate” command and move data from a decoded row address into a primary sense amplifier set associated with a memory block containing the decoded row address and into the row cache, prior to application of a “read” command to the SDRAM. Column decoders decode a column address in response to a “read” command and for reading data from the cache in accordance with the decoded column address.