Method and apparatus for branch execution on a
multiple-instruction-set-architecture microprocessor
    1.
    发明授权
    Method and apparatus for branch execution on a multiple-instruction-set-architecture microprocessor 失效
    在多指令集架构微处理器上执行分支的方法和装置

    公开(公告)号:US6088793A

    公开(公告)日:2000-07-11

    申请号:US777237

    申请日:1996-12-30

    IPC分类号: G06F9/32 G06F9/38

    摘要: A microprocessor capable of predicting program branches includes a fetching unit, a branch prediction unit, and a decode unit. The fetching unit is configured to retrieve program instructions, including macro branch instructions. The branch prediction unit is configured to receive the program instructions from the fetching unit, analyze the program instructions to identify the macro branch instructions, determine a first branch prediction for each of the macro branch instructions, and direct the fetching unit to retrieve the program instructions in an order corresponding to the first branch predictions. The decode unit is configured to receive the program instructions in the order determined by the branch prediction unit, break down the program instructions into micro-operations, and determine a decoded branch micro-operation corresponding to each of the macro branch instructions requiring verification, such that each of the decoded branch micro-operations has a decoded branch outcome of taken, if the first branch prediction is incorrect, and not taken if the first branch prediction is correct. The microprocessor may also include an execution engine configured to execute the micro-operations and determine the decoded branch outcome for each of the decoded branch micro-operations and communicate each decoded branch outcome of taken to the fetching unit such that the fetching unit can re-retrieve the program instructions in a corrected order corresponding to each incorrect first branch prediction.

    摘要翻译: 能够预测程序分支的微处理器包括取出单元,分支预测单元和解码单元。 提取单元被配置为检索程序指令,包括宏分支指令。 分支预测单元被配置为从提取单元接收程序指令,分析程序指令以识别宏分支指令,确定每个宏分支指令的第一分支预测,并且指示提取单元检索程序指令 以与第一分支预测相对应的顺序。 解码单元被配置为以由分支预测单元确定的顺序接收程序指令,将程序指令分解为微操作,并且确定与需要验证的每个宏分支指令相对应的解码分支微操作, 如果第一分支预测不正确,则每个解码分支微操作具有解码的分支结果,如果第一分支预测是正确的,则不采用。 微处理器还可以包括执行引擎,其被配置为执行微操作并且为每个解码的分支微操作确定解码的分支结果,并将采集的每个解码的分支结果传送到取出单元, 以对应于每个不正确的第一分支预测的校正顺序检索程序指令。