公开(公告)号：US5725407A

公开(公告)日：1998-03-10

申请号：US630707

申请日：1996-04-08

申请人： Nan-Chou D. Liu ,  Jammy Chin-Ming Huang ,  Jin-Yuh Lu

发明人： Nan-Chou D. Liu ,  Jammy Chin-Ming Huang ,  Jin-Yuh Lu

IPC分类号： H01J9/227 ,  H01J29/32

CPC分类号： H01J29/327 ,  H01J9/2276 ,  H01J9/2278

摘要： A process is described for the manufacture of a luminescent screen that eliminates image distorting or crosstalk effects resulting from secondary and back-scattered electrons that end up in adjoining sub-pixels. An unusually thick (ca. 70 microns) black matrix is first formed on the substrate surface and is given a tapered cross-sectional shape such that it is smaller at its top surface than at the substrate surface. Said tapered profile may be achieved through a screen-on process or by an overetching process. This is followed by the deposition of a transparent conductive layer, such as ITO, onto which the various layers of different phosphors that make up the sub-pixels of the display are deposited by means of electrophoresis.

摘要翻译： 描述了用于制造发光屏的方法，其消除由邻近的子像素中的次级和反向散射的电子产生的图像失真或串扰效应。 首先在衬底表面上形成非常厚（约70微米）的黑色矩阵，并且具有锥形横截面形状，使得其在顶表面处比在衬底表面处更小。 所述锥形轮廓可以通过筛选过程或通过过蚀刻方法来实现。 随后沉积透明导电层，例如ITO，通过电泳沉积构成显示器的子像素的不同荧光体的各种层。

公开(公告)号：US5624872A

公开(公告)日：1997-04-29

申请号：US628069

申请日：1996-04-08

申请人： Nan-Chou D. Liu

发明人： Nan-Chou D. Liu

IPC分类号： H01J9/02 ,  H01L21/465

CPC分类号： H01J9/025

摘要： A process is described for manufacturing a field emission device that has low capacitance as well as low internal resistance. The process begins with the provision of an insulating substrate on which cathode columns and orthonal gate lines, separated by a relatively thick insulating layer (to reduce capacitance), have been formed. Openings in the gate lines, located above the cathode columns and extending down to the level of the insulating layer, are then formed. Using the gate lines as a mask, the insulating layer is then etched down to the level of the cathode columns, thereby forming wells in the insulating layer. These wells are then filled with additional conductive material which is then partially removed. This results in the formation of conductive pedestals, inside the wells, on which the microtips (which are then formed in the usual manner) rest. This allows the microtips to retain electrical contact with the cathode columns while still keeping their apexes in line with the gate line openings.

摘要翻译： 描述了用于制造具有低电容以及低内阻的场致发射器件的工艺。 该过程开始于提供绝缘衬底，在绝缘衬底上已经形成了由相对较厚的绝缘层分开的阴极柱和人造栅极线（以减小电容）。 然后形成位于阴极柱上方并向下延伸到绝缘层的水平面的栅极线的开口。 使用栅极线作为掩模，然后将绝缘层蚀刻到阴极柱的水平面，从而在绝缘层中形成阱。 然后用另外的导电材料填充这些孔，然后部分地除去。 这导致在孔内部形成导电基座，微孔（其然后以常规方式形成）放置在其上。 这允许微尖端保持与阴极柱的电接触，同时仍保持其顶点与栅极线开口一致。