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    METHODS AND APPARATUSES FOR A COMPILER SERVER
    1.
    发明申请
    METHODS AND APPARATUSES FOR A COMPILER SERVER 有权
    编译器服务器的方法和设备

    公开(公告)号：US20100313079A1

    公开(公告)日：2010-12-09

    申请号：US12477859

    申请日：2009-06-03

    Applicant: Robert Beretta ,  Nicholas William Burns ,  Nathaniel Begeman ,  Phillip Kent Miller ,  Geoffrey Grant Stahl

    Inventor： Robert Beretta ,  Nicholas William Burns ,  Nathaniel Begeman ,  Phillip Kent Miller ,  Geoffrey Grant Stahl

    IPC: G06F9/45 ,  G06F11/07 ,  G06F12/08

    CPC classification number: G06F8/41 ,  G06F9/44521 ,  G06F9/5055 ,  G06F21/53 ,  G06F2209/509

    Abstract: A method and an apparatus that instructs a compiler server to build or otherwise obtain a compiled code corresponding to a compilation request received from an application are described. The compiler server may be configured to compile source codes for a plurality of independent applications, each running in a separate process, using a plurality of independent compilers, each running in a separate compiler process. A search may be performed in a cache for a compiled code that satisfies a compilation request received from an application. A reply message including the compiled code can be provided for the application, wherein the compiled code is compiled in direct response to the request, or is obtained from the cache if the search identifies in the cache the compiled code that satisfies the compilation request.

    Abstract translation: 描述了指示编译器服务器构建或以其他方式获得与从应用接收的编译请求相对应的编译代码的方法和装置。 可以将编译器服务器配置为编译多个独立应用程序的源代码，每个独立应用程序使用多个独立的编译器在单独的进程中运行，每个程序运行在单独的编译程序中。 可以在高速缓存中执行满足从应用接收的编译请求的编译代码的搜索。 可以为应用提供包括编译代码的回复消息，其中编译代码是直接响应该请求编译的，或者如果搜索在高速缓存中标识满足编译请求的编译代码，则从高速缓存获得。

    MULTI-DIMENSIONAL THREAD GROUPING FOR MULTIPLE PROCESSORS
    2.
    发明申请
    MULTI-DIMENSIONAL THREAD GROUPING FOR MULTIPLE PROCESSORS 有权
    多处理器的多维螺纹组

    公开(公告)号：US20090307704A1

    公开(公告)日：2009-12-10

    申请号：US12264894

    申请日：2008-11-04

    Applicant: AAFTAB A. MUNSHI ,  Nathaniel Begeman

    Inventor： AAFTAB A. MUNSHI ,  Nathaniel Begeman

    IPC: G06F9/50 ,  G06F9/46

    CPC classification number: G06F9/4843 ,  G06F9/5044 ,  G06F2209/5017 ,  G06F2209/509

    Abstract: A method and an apparatus that determine a total number of threads to concurrently execute executable codes compiled from a single source for target processing units in response to an API (Application Programming Interface) request from an application running in a host processing unit are described. The target processing units include GPUs (Graphics Processing Unit) and CPUs (Central Processing Unit). Thread group sizes for the target processing units are determined to partition the total number of threads according to a multi-dimensional global thread number included in the API request. The executable codes are loaded to be executed in thread groups with the determined thread group sizes concurrently in the target processing units.

    Abstract translation: 描述了响应于来自在主机处理单元中运行的应用的API（应用程序编程接口）请求，确定用于目标处理单元从单个源编译的并行执行可执行代码的总线程数的方法和装置。 目标处理单元包括GPU（图形处理单元）和CPU（中央处理单元）。 根据API请求中包含的多维全局线程号，确定目标处理单元的线程组大小以分配总线程数。 可执行代码被加载以在目标处理单元中并发确定的线程组大小的线程组中执行。

    APPLICATION PROGRAMMING INTERFACES FOR DATA PARALLEL COMPUTING ON MULTIPLE PROCESSORS
    3.
    发明申请
    APPLICATION PROGRAMMING INTERFACES FOR DATA PARALLEL COMPUTING ON MULTIPLE PROCESSORS 有权
    用于多个处理器的数据并行计算的应用编程接口

    公开(公告)号：US20090307699A1

    公开(公告)日：2009-12-10

    申请号：US12264896

    申请日：2008-11-04

    Applicant: AAFTAB A. MUNSHI ,  Nathaniel Begeman

    Inventor： AAFTAB A. MUNSHI ,  Nathaniel Begeman

    IPC: G06F9/46

    CPC classification number: G06F9/5027 ,  G06F3/00 ,  G06F8/41 ,  G06F9/44 ,  G06F9/46 ,  G06F9/4843 ,  G06F9/5016 ,  G06F9/5044 ,  G06F9/54 ,  G06F2209/5018 ,  G06F2209/509

    Abstract: A method and an apparatus for a parallel computing program calling APIs (application programming interfaces) in a host processor to perform a data processing task in parallel among compute units are described. The compute units are coupled to the host processor including central processing units (CPUs) and graphic processing units (GPUs). A program object corresponding to a source code for the data processing task is generated in a memory coupled to the host processor according to the API calls. Executable codes for the compute units are generated from the program object according to the API calls to be loaded for concurrent execution among the compute units to perform the data processing task.

    Abstract translation: 描述了用于在主处理器中调用API（应用程序编程接口）并行计算程序的方法和装置，以在计算单元之间并行地执行数据处理任务。 计算单元耦合到主处理器，包括中央处理单元（CPU）和图形处理单元（GPU）。 根据API调用在与主机处理器耦合的存储器中产生与数据处理任务的源代码相对应的程序对象。 计算单元的可执行代码根据要在计算单元之间并行执行的API调用从程序对象生成以执行数据处理任务。

    Application programming interfaces for data parallel computing on multiple processors
    4.
    发明授权
    Application programming interfaces for data parallel computing on multiple processors 有权
    用于多个处理器上的数据并行计算的应用程序编程接口

    公开(公告)号：US08286198B2

    公开(公告)日：2012-10-09

    申请号：US12264896

    申请日：2008-11-04

    Applicant: Aaftab A. Munshi ,  Nathaniel Begeman

    Inventor： Aaftab A. Munshi ,  Nathaniel Begeman

    IPC: G06F3/00 ,  G06F9/46 ,  G06F9/44 ,  G06F9/45

    CPC classification number: G06F9/5027 ,  G06F3/00 ,  G06F8/41 ,  G06F9/44 ,  G06F9/46 ,  G06F9/4843 ,  G06F9/5016 ,  G06F9/5044 ,  G06F9/54 ,  G06F2209/5018 ,  G06F2209/509

    Abstract: A method and an apparatus for a parallel computing program calling APIs (application programming interfaces) in a host processor to perform a data processing task in parallel among compute units are described. The compute units are coupled to the host processor including central processing units (CPUs) and graphic processing units (GPUs). A program object corresponding to a source code for the data processing task is generated in a memory coupled to the host processor according to the API calls. Executable codes for the compute units are generated from the program object according to the API calls to be loaded for concurrent execution among the compute units to perform the data processing task.

    Abstract translation: 描述了用于在主处理器中调用API（应用程序编程接口）并行计算程序的方法和装置，以在计算单元之间并行地执行数据处理任务。 计算单元耦合到主处理器，包括中央处理单元（CPU）和图形处理单元（GPU）。 根据API调用在与主机处理器耦合的存储器中产生与数据处理任务的源代码相对应的程序对象。 计算单元的可执行代码根据要在计算单元之间并行执行的API调用从程序对象生成以执行数据处理任务。

    Methods and apparatuses for a compiler server
    5.
    发明授权
    Methods and apparatuses for a compiler server 有权
    编译器服务器的方法和设备

    公开(公告)号：US08677329B2

    公开(公告)日：2014-03-18

    申请号：US12477859

    申请日：2009-06-03

    Applicant: Robert Beretta ,  Nicholas William Burns ,  Nathaniel Begeman ,  Phillip Kent Miller ,  Geoffrey Grant Stahl

    Inventor： Robert Beretta ,  Nicholas William Burns ,  Nathaniel Begeman ,  Phillip Kent Miller ,  Geoffrey Grant Stahl

    IPC: G06F9/45

    CPC classification number: G06F8/41 ,  G06F9/44521 ,  G06F9/5055 ,  G06F21/53 ,  G06F2209/509

    Abstract: A method and an apparatus that instructs a compiler server to build or otherwise obtain a compiled code corresponding to a compilation request received from an application are described. The compiler server may be configured to compile source codes for a plurality of independent applications, each running in a separate process, using a plurality of independent compilers, each running in a separate compiler process. A search may be performed in a cache for a compiled code that satisfies a compilation request received from an application. A reply message including the compiled code can be provided for the application, wherein the compiled code is compiled in direct response to the request, or is obtained from the cache if the search identifies in the cache the compiled code that satisfies the compilation request.

    Abstract translation: 描述了指示编译器服务器构建或以其他方式获得与从应用接收的编译请求相对应的编译代码的方法和装置。 可以将编译器服务器配置为编译多个独立应用程序的源代码，每个独立应用程序使用多个独立的编译器在单独的进程中运行，每个程序运行在单独的编译程序中。 可以在高速缓存中执行满足从应用接收的编译请求的编译代码的搜索。 可以为应用提供包括编译代码的回复消息，其中编译代码是直接响应该请求编译的，或者如果搜索在高速缓存中标识满足编译请求的编译代码，则从高速缓存获得。

    Method and apparatus for simplifying the decoding of data
    8.
    发明授权
    Method and apparatus for simplifying the decoding of data 有权
    简化数据解码的方法和装置

    公开(公告)号：US07716166B2

    公开(公告)日：2010-05-11

    申请号：US11650712

    申请日：2007-01-07

    Applicant: Eric J. Albert ,  Nathaniel Begeman ,  Sean Gies

    Inventor： Eric J. Albert ,  Nathaniel Begeman ,  Sean Gies

    IPC: G06F7/00

    CPC classification number: H04N1/41

    Abstract: The various methods and devices described herein relate to devices which, in at least certain embodiments, may include a method of decoding data or a data stream in a file, which may include checking for a first data portion of a plurality of data portions in the file, the first data portion having a first data value, reading in data from another data portion of the plurality of data portions, decoding or decompressing the data, performing a checksum operation on the decoded data if the first data portion having the first data value is not detected, and skipping a checksum operation on the decoded data if the first data portion having the first data value is detected. In the embodiment, a checksum operation on encoded data may also be skipped. In an embodiment, the first data value may include information or instructions about how a decoder may decode the data and may also include a tag or identifier.

    Abstract translation: 本文描述的各种方法和设备涉及在至少某些实施例中可以包括对文件中的数据或数据流进行解码的方法的装置，其可以包括检查文件中的多个数据部分的第一数据部分 文件，所述第一数据部分具有第一数据值，从所述多个数据部分的另一数据部分读取数据，解码或解压缩数据，如果所述第一数据部分具有所述第一数据值，则对所述解码数据执行校验和操作 并且如果检测到具有第一数据值的第一数据部分，则对解码数据跳过校验和操作。 在本实施例中，还可以跳过对编码数据的校验和操作。 在一个实施例中，第一数据值可以包括关于解码器如何解码数据并且还可以包括标签或标识符的信息或指令。

    Multi-dimensional thread grouping for multiple processors
    9.
    发明授权
    Multi-dimensional thread grouping for multiple processors 有权

    公开(公告)号：US09720726B2

    公开(公告)日：2017-08-01

    申请号：US13534900

    申请日：2012-06-27

    Applicant: Aaftab A. Munshi ,  Nathaniel Begeman

    Inventor： Aaftab A. Munshi ,  Nathaniel Begeman

    IPC: G06F9/46 ,  G06F9/48 ,  G06F9/50

    CPC classification number: G06F9/4843 ,  G06F9/5044 ,  G06F2209/5017 ,  G06F2209/509

    Abstract: A method and an apparatus that partition a total number of threads to concurrently execute executable codes compiled from a single source for target processing units in response to an API (Application Programming Interface) request from an application running in a host processing unit are described. The total number of threads is based on a multi-dimensional value for a global thread number specified in the API. The target processing units include GPUs (Graphics Processing Unit) and CPUs (Central Processing Unit). Thread group sizes for the target processing units are determined to partition the total number of threads according to either a dimension for a data parallel task associated with the executable codes or a dimension for a multi-dimensional value for a local thread group number. The executable codes are loaded to be executed in thread groups with the determined thread group sizes concurrently in the target processing units.

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