公开(公告)号：US07746925B1

公开(公告)日：2010-06-29

申请号：US11528037

申请日：2006-09-27

申请人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

发明人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

IPC分类号： H03H7/30 ,  H03K5/159

CPC分类号： H04L25/03057 ,  H04L2025/03401 ,  H04L2025/0349

摘要： A feedback equalizer includes a summing unit having an output and first input for receiving a modulated signal, which includes a symbol defined by a first number of chips. A subsymbol processor is coupled to the output of the summing unit. The symbol processor is capable of generating a subsymbol waveform upon receipt of a second number of chips of the symbol. The second number is less than the first number. A feedback filter is coupled to a second input of the summing unit and the symbol processing unit to selectively filter the subsymbol waveform from the modulated signal.

摘要翻译： 反馈均衡器包括具有用于接收调制信号的输出和第一输入的求和单元，该调制信号包括由第一数量的码片定义的符号。 子符号处理器耦合到求和单元的输出。 符号处理器能够在接收到符号的第二数量的码片时产生子符号波形。 第二个数字小于第一个数字。 反馈滤波器耦合到求和单元和符号处理单元的第二输入端，以选择性地从调制信号滤波子符号波形。

公开(公告)号：US08059707B1

公开(公告)日：2011-11-15

申请号：US12825738

申请日：2010-06-29

申请人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

发明人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

IPC分类号： H03H7/34 ,  H03K5/159

CPC分类号： H04L25/03057 ,  H04L2025/03401 ,  H04L2025/0349

摘要： A decoding unit for decoding a modulated signal includes a summing unit having i) a first input, ii) a second input, and iii) an output. The summing unit is configured to i) receive the modulated signal at the first input, ii) receive a feedback signal at the second input, and iii) output a first waveform based on the modulated signal and the feedback signal. A demodulation unit has a first demodulation pathway and a second demodulation pathway. The demodulation unit is configured to i) select between the first demodulation pathway and the second demodulation pathway, ii) receive and demodulate the modulated signal with the first demodulation pathway, and iii) receive and demodulate the first waveform with the second demodulation pathway. The remodulation unit is configured to selectively i) output a first complex waveform based on the modulated signal, and ii) output a subsymbol waveform of the first waveform.

摘要翻译： 用于对调制信号进行解码的解码单元包括具有i）第一输入的加法单元，ii）第二输入，以及iii）输出。 求和单元被配置为i）在第一输入处接收调制信号，ii）在第二输入处接收反馈信号，以及iii）基于调制信号和反馈信号输出第一波形。 解调单元具有第一解调路径和第二解调路径。 所述解调单元被配置为i）在所述第一解调路径和所述第二解调路径之间进行选择，ii）利用所述第一解调路径来接收和解调所述调制信号，以及iii）利用所述第二解调路径来接收和解调所述第一波形。 再调制单元被配置为选择性地i）基于调制信号输出第一复数波形，以及ii）输出第一波形的子符号波形。

公开(公告)号：US07263119B1

公开(公告)日：2007-08-28

申请号：US10080826

申请日：2002-02-21

申请人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

发明人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

IPC分类号： H04B1/69 ,  H04B1/713

CPC分类号： H04L25/03057 ,  H04L2025/03401 ,  H04L2025/0349

摘要： Techniques and instrumentalities to improve ISI and ICI cancellation in reception of modulated symbols by selectively decoding subsymbols of such modulated symbol before they can be completely decided or perceived as well as use of decoded symbol/subsymbol information in the feedback equalization process are disclosed. In particular, a decoder and corresponding method are disclosed which includes a feedback equalizer capable of receiving a modulated signal including a symbol defined by a first number of chips, along with a subsymbol processor to generate a subsymbol waveform upon receipt of a second number, less than the first number, of chips of such symbol and provide the subsymbol waveform to the feedback equalizer in order to equalize the modulated signal using the subsymbol waveform. Other disclosed aspects including techniques and instrumentalities for improving reception performance when symbols encoded by different modulation schemes are encountered, as well as feedback equalization for Barker encoded symbols present in the received signal.

摘要翻译： 公开了通过在完全决定或感知之前选择性地解码这种调制符号的子符号以及在反馈均衡过程中使用解码的符号/子符号信息来改善接收调制符号时的ISI和ICI消除的技术和手段。 特别地，公开了一种解码器和相应的方法，其包括反馈均衡器，该反馈均衡器能够接收包括由第一数量的码片定义的符号的调制信号以及子符号处理器，以在接收到第二数量时产生子符号波形 比第一数量的这样的符号的芯片，并将子符号波形提供给反馈均衡器，以便使用子符号波形来均衡调制信号。 其他公开的方面包括在遇到由不同调制方案编码的符号时改善接收性能的技术和手段，以及对接收信号中存在的巴克编码符号的反馈均衡。

公开(公告)号：US07606296B1

公开(公告)日：2009-10-20

申请号：US11811513

申请日：2007-06-11

申请人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

发明人： Yungping Hsu ,  Nelson Xu ,  Ricky Cheung

IPC分类号： H04B1/69 ,  H04B1/713

CPC分类号： H04L25/03057 ,  H04L2025/03401 ,  H04L2025/0349

摘要： A decoder comprises an equalizer that receives a modulated signal comprising a plurality of symbols including a first symbol defined by a first number of chips. A subsymbol processor that generates a subsymbol waveform after receiving a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol. The second number is less than the first number, and wherein the equalizer equalizes the modulated signal using the subsymbol waveform.

摘要翻译： 解码器包括均衡器，其接收包括多个符号的调制信号，所述多个符号包括由第一数量的码片定义的第一符号。 一种子符号处理器，其在接收到第一符号的第二数量的码片之后以及在接收，解码和确定第一符号的第一码片数目中的至少一个之前产生子符号波形。 第二个数字小于第一个数字，并且其中均衡器使用子符号波形来均衡调制信号。