利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

6 条记录 (耗时 0.009 秒)

    Digital Voltage Boost Circuit
    1.
    发明申请
    Digital Voltage Boost Circuit 有权
    数字电压升压电路

    公开(公告)号：US20130155787A1

    公开(公告)日：2013-06-20

    申请号：US13326727

    申请日：2011-12-15

    申请人： James W. Dawson ,  Noam Jungmann ,  Elazar Kachir ,  Udi Nir ,  Donald W. Plass

    发明人： James W. Dawson ,  Noam Jungmann ,  Elazar Kachir ,  Udi Nir ,  Donald W. Plass

    IPC分类号： G11C5/14 ,  G05F3/02

    CPC分类号： G11C5/147

    摘要： A digital voltage boost circuit, optionally working in parallel with an analog voltage regulator, periodically injects a constant amount of current each cycle into the bit line of a high density memory array to eliminate the bias voltage reduction which would otherwise occur. This results in a much faster recovery time and reduces the semiconductor real estate required. A pulse generator in the boost circuit generates one or more current modulation signals which control corresponding current supply devices in a current source. The boost circuit drives a constant amount of current to the bias voltage node each memory cycle.

    摘要翻译： 可选地与模拟电压调节器并联的数字升压电路周期性地将恒定量的电流每周期注入高密度存储器阵列的位线，以消除否则将发生的偏置电压降低。 这导致恢复时间快得多，并减少了所需的半导体房地产。 升压电路中的脉冲发生器产生一个或多个电流调制信号，其控制电流源中的相应的电流供应装置。 升压电路驱动每个存储周期对偏置电压节点的恒定电流量。

    Digital voltage boost circuit
    3.
    发明授权
    Digital voltage boost circuit 有权
    数字升压电路

    公开(公告)号：US08937840B2

    公开(公告)日：2015-01-20

    申请号：US13326727

    申请日：2011-12-15

    申请人： James W. Dawson ,  Noam Jungmann ,  Elazar Kachir ,  Udi Nir ,  Donald W. Plass

    发明人： James W. Dawson ,  Noam Jungmann ,  Elazar Kachir ,  Udi Nir ,  Donald W. Plass

    IPC分类号： G11C5/14

    CPC分类号： G11C5/147

    摘要： A digital voltage boost circuit, optionally working in parallel with an analog voltage regulator, periodically injects a constant amount of current each cycle into the bit line of a high density memory array to eliminate the bias voltage reduction which would otherwise occur. This results in a much faster recovery time and reduces the semiconductor real estate required. A pulse generator in the boost circuit generates one or more current modulation signals which control corresponding current supply devices in a current source. The boost circuit drives a constant amount of current to the bias voltage node each memory cycle.

    摘要翻译： 可选地与模拟电压调节器并联的数字升压电路周期性地将恒定量的电流每周期注入高密度存储器阵列的位线，以消除否则将发生的偏置电压降低。 这导致恢复时间快得多，并减少了所需的半导体房地产。 升压电路中的脉冲发生器产生一个或多个电流调制信号，其控制电流源中的相应的电流供应装置。 升压电路驱动每个存储周期对偏置电压节点的恒定电流量。

    Systems and methods for memory device precharging
    5.
    发明授权
    Systems and methods for memory device precharging 有权
    存储器预充电的系统和方法

    公开(公告)号：US08472271B2

    公开(公告)日：2013-06-25

    申请号：US13030341

    申请日：2011-02-18

    申请人： James W. Dawson ,  Rajiv V. Joshi ,  Noam Jungmann ,  Elazar Kachir ,  Rouwaida N. Kanj ,  Ehud Nir ,  Donald W. Plass

    发明人： James W. Dawson ,  Rajiv V. Joshi ,  Noam Jungmann ,  Elazar Kachir ,  Rouwaida N. Kanj ,  Ehud Nir ,  Donald W. Plass

    IPC分类号： G11C7/00

    CPC分类号： G11C7/12 ,  G11C7/1048 ,  G11C11/413

    摘要： Systems and methods for determining optimal memory device precharge voltages are provided herein. In addition, systems and methods for providing localized sense amplification and circuit assist circuitry are described herein. Embodiments provide for determining precharge multipliers that may be used to determine the optimal precharge voltage based on a precharge source voltage. According to embodiments, the precharge source voltage may be Vdd or Vcs. Optimizing the precharge voltage maximizes memory device performance and functional characteristics, including, but not limited to, stability, efficiency, power, writability, and reliability.

    摘要翻译： 本文提供了用于确定最佳存储器件预充电电压的系统和方法。 此外，本文描述了用于提供局部感测放大和电路辅助电路的系统和方法。 实施例提供了用于确定预充电乘法器，其可以用于基于预充电源电压来确定最佳预充电电压。 根据实施例，预充电源电压可以是Vdd或Vcs。 优化预充电电压使存储器件性能和功能特性最大化，包括但不限于稳定性，效率，功率，写入性和可靠性。

    SYSTEMS AND METHODS FOR MEMORY DEVICE PRECHARGING
    6.
    发明申请
    SYSTEMS AND METHODS FOR MEMORY DEVICE PRECHARGING 有权
    用于存储器件预处理的系统和方法

    公开(公告)号：US20120213023A1

    公开(公告)日：2012-08-23

    申请号：US13030341

    申请日：2011-02-18

    申请人： James W. Dawson ,  Rajiv V. Joshi ,  Noam Jungmann ,  Elazar Kachir ,  Rouwaida N. Kanj ,  Ehud Nir ,  Donald W. Plass

    发明人： James W. Dawson ,  Rajiv V. Joshi ,  Noam Jungmann ,  Elazar Kachir ,  Rouwaida N. Kanj ,  Ehud Nir ,  Donald W. Plass

    IPC分类号： G11C7/12

    CPC分类号： G11C7/12 ,  G11C7/1048 ,  G11C11/413

    摘要： Systems and methods for determining optimal memory device precharge voltages are provided herein. In addition, systems and methods for providing localized sense amplification and circuit assist circuitry are described herein. Embodiments provide for determining precharge multipliers that may be used to determine the optimal precharge voltage based on a precharge source voltage. According to embodiments, the precharge source voltage may be Vdd or Vcs. Optimizing the precharge voltage maximizes memory device performance and functional characteristics, including, but not limited to, stability, efficiency, power, writability, and reliability.

    摘要翻译： 本文提供了确定最佳存储器件预充电电压的系统和方法。 此外，本文描述了用于提供局部感测放大和电路辅助电路的系统和方法。 实施例提供了用于确定预充电乘法器，其可以用于基于预充电源电压来确定最佳预充电电压。 根据实施例，预充电源电压可以是Vdd或Vcs。 优化预充电电压使存储器件性能和功能特性最大化，包括但不限于稳定性，效率，功率，写入性和可靠性。