Method for constructing an integrated circuit device having fixed and programmable logic portions and programmable logic architecture for use therewith
    1.
    发明授权
    Method for constructing an integrated circuit device having fixed and programmable logic portions and programmable logic architecture for use therewith 有权
    用于构建具有固定和可编程逻辑部分的集成电路器件的方法以及与其一起使用的可编程逻辑结构

    公开(公告)号:US07257803B1

    公开(公告)日:2007-08-14

    申请号:US11224156

    申请日:2005-09-12

    CPC classification number: G06F17/5054

    Abstract: Integrated circuit devices having fixed and programmable logic portions are made by combining a hardware description language representation of the fixed logic and a hardware description language representation of the programmable logic to create a single hardware description language representation of a device. This allows multiple portions of programmable logic, distributed where needed in whatever size needed, to be interspersed among the fixed logic. Because the behavior of the programmable logic, rather than of the user programming, is being represented, a programmable logic architecture is provided that lacks behaviors, such as combinational loops, that would cause compilation of the hardware description language to generate errors.

    Abstract translation: 具有固定和可编程逻辑部分的集成电路装置通过组合固定逻辑的硬件描述语言表示和可编程逻辑的硬件描述语言表示来创建设备的单个硬件描述语言表示。 这允许可编程逻辑的多个部分,分布在需要的任何大小的所需尺寸上,以分散在固定逻辑中。 由于可编程逻辑(而不是用户编程)的行为被表示,所以提供了一种可编程逻辑体系结构,其缺少行为,例如组合循环,这将导致硬件描述语言的编译以产生错误。

    Method for constructing an integrated circuit device having fixed and programmable logic portions and programmable logic architecture for use therewith
    3.
    发明授权
    Method for constructing an integrated circuit device having fixed and programmable logic portions and programmable logic architecture for use therewith 失效
    用于构建具有固定和可编程逻辑部分的集成电路器件的方法以及与其一起使用的可编程逻辑结构

    公开(公告)号:US06983442B1

    公开(公告)日:2006-01-03

    申请号:US10649401

    申请日:2003-08-26

    CPC classification number: G06F17/5054

    Abstract: Integrated circuit devices having fixed and programmable logic portions are made by combining a hardware description language representation of the fixed logic and a hardware description language representation of the programmable logic to create a single hardware description language representation of a device. This allows multiple portions of programmable logic, distributed where needed in whatever size needed, to be interspersed among the fixed logic. Because the behavior of the programmable logic, rather than of the user programming, is being represented, a programmable logic architecture is provided that lacks behaviors, such as combinational loops, that would cause compilation of the hardware description language to generate errors.

    Abstract translation: 具有固定和可编程逻辑部分的集成电路装置通过组合固定逻辑的硬件描述语言表示和可编程逻辑的硬件描述语言表示来创建设备的单个硬件描述语言表示。 这允许可编程逻辑的多个部分,分布在需要的任何大小的所需尺寸上,以分散在固定逻辑中。 由于可编程逻辑(而不是用户编程)的行为被表示,所以提供了一种可编程逻辑体系结构,其缺少行为,例如组合循环,这将导致硬件描述语言的编译以产生错误。

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