公开(公告)号：US06507884B1

公开(公告)日：2003-01-14

申请号：US09218768

申请日：1998-12-22

申请人： Kazumasa Chigira ,  Tsunehiko Yatsu ,  Kazuo Hotaka ,  Norimasa Kanahori

发明人： Kazumasa Chigira ,  Tsunehiko Yatsu ,  Kazuo Hotaka ,  Norimasa Kanahori

IPC分类号： G06F1200

CPC分类号： G06F12/06 ,  G06F12/04 ,  G11C16/102

摘要： A selection circuit causes either a memory 6H or 6L to enter an enabled state according to address data A16 of address data A0-A16 when a mode signal M is 1. The selection circuit comprises OR gates (10, 12) which output different outputs. When the address data A16 is 0, a nonvolatile memory 6L enters an enabled state. Then, the memory 6L is addressed according to the address data A0-A15 so that, for example, 8-bit lower data is written therein. On the other hand, when the address data A16 is 1, a nonvolatile memory 6H becomes in an enabled state. Then, the memory 6H is addressed according to the address data A0-A15 so that, for example, 8-bit upper data is written therein. Also, when an external terminal (17) is grounded, and a mode signal become 0, the OR gates (10, 12) outputs signals 0, so that the memories 6H, 6L simultaneously become in an enabled state. When data is read from corresponding addresses of each memory, data of, for example, 16-bits is obtained.

摘要翻译： 当模式信号M为1时，选择电路使得存储器6H或6L根据地址数据A0-A16的地址数据A16进入使能状态。选择电路包括输出不同输出的或门（10,12）。 当地址数据A16为0时，非易失性存储器6L进入使能状态。 然后，根据地址数据A0-A15对存储器6L进行寻址，以便例如在其中写入8位较低的数据。 另一方面，当地址数据A16为1时，非易失性存储器6H变为使能状态。 然后，根据地址数据A0-A15对存储器6H进行寻址，使得例如在其中写入8位上位数据。 此外，当外部端子（17）接地并且模式信号变为0时，或门（10,12）输出信号0，使得存储器6H，6L同时变为使能状态。 当从每个存储器的相应地址读取数据时，获得例如16位的数据。

公开(公告)号：US06298412B1

公开(公告)日：2001-10-02

申请号：US09218944

申请日：1998-12-22

申请人： Tsunehiko Yatsu ,  Kazumasa Chigira ,  Kazuo Hotaka ,  Norimasa Kanahori

发明人： Tsunehiko Yatsu ,  Kazumasa Chigira ,  Kazuo Hotaka ,  Norimasa Kanahori

IPC分类号： G06F1202

CPC分类号： G06F15/7814 ,  G11C16/102

摘要： When writing of data into nonvolatile memories 8H and 8L is started, data D7 and D15 corresponding to the 128th word of a data input section 8B are inverted and outputted. When accurate writing is subsequently performed, the data D7 and D15 are outputted as they are. By monitoring a change of the data D7 and D15 from the nonvolatile memories 8H and 8L, it is possible to detect whether writing is still continuing or has already completed. Thus, by using nonvolatile memories of 8 bit data width or the like, a 16-bit microcomputer can be easily realized.

摘要翻译： 当将数据写入非易失性存储器8H和8L时，与数据输入部分8B的第128个字对应的数据D7和D15被反相输出。 当随后执行精确写入时，数据D7和D15原样输出。 通过监视来自非易失性存储器8H和8L的数据D7和D15的变化，可以检测写入是否仍在继续或已经完成。 因此，通过使用8位数据宽度等的非易失性存储器，可以容易地实现16位微型计算机。