公开(公告)号：US06795930B1

公开(公告)日：2004-09-21

申请号：US09716645

申请日：2000-11-20

申请人： Gilbert Laurenti ,  Olivier Morchipont ,  Laurent Ichard

发明人： Gilbert Laurenti ,  Olivier Morchipont ,  Laurent Ichard

IPC分类号： G06F126

CPC分类号： G06F9/3853 ,  G06F1/3203 ,  G06F1/3287 ,  G06F9/30036 ,  G06F9/30065 ,  G06F9/30145 ,  G06F9/30167 ,  G06F9/325 ,  G06F9/381 ,  Y02D10/171

摘要： A microprocessor and a method of operating the microprocessor are provided in which a portion of the microprocessor is partitioned into a plurality of partitions. A sequence of instructions is executed within an instruction pipeline of the microprocessor. A block of instructions within the sequence of instructions is repetitively executed in response to a local repeat instruction. Either prior to executing the block of instructions, or during the first iteration of the loop, a determination is made that at least one of the plurality of partitions is not needed to execute the block of instructions. Operation of the at least one identified partition is inhibited during the repetitive execution of the block of instructions in order to reduce power dissipation.

摘要翻译： 提供微处理器和操作微处理器的方法，其中微处理器的一部分被分割成多个分区。 在微处理器的指令流水线内执行指令序列。 响应于本地重复指令重复地执行指令序列内的指令块。 在执行指令块之前或在循环的第一次迭代期间，确定执行指令块不需要多个分区中的至少一个分区。 在重复执行指令块期间，禁止至少一个识别的分区的操作，以便降低功耗。