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    Analog-to-digital converter with a decision circuit and an optimized decision threshold
    1.
    发明授权
    Analog-to-digital converter with a decision circuit and an optimized decision threshold 失效
    具有决策电路和优化决策阈值的模数转换器

    公开(公告)号：US07564925B2

    公开(公告)日：2009-07-21

    申请号：US11313908

    申请日：2005-12-22

    申请人： Arnaud Bisson ,  Omar Ait Sab

    发明人： Arnaud Bisson ,  Omar Ait Sab

    IPC分类号： H03K9/00 ,  H04B10/06

    CPC分类号： H04L25/063 ,  H03K5/086

    摘要： The device includes a decision circuit (6a) for providing, by comparing the amplitude of a received modulated signal (Sr) to a decision threshold (Vth, Th), a binary signal (Sb) with two states respectively representing first and second binary values that respectively correspond to low and high values of the received signal. A counting module (12) activated during successive time periods calculates a differential numerical value (DN, SDN) representing the algebraic difference between the two numbers of bits of the binary signal that respectively have the second binary value and the first binary value. At the end of each time period, an adjustment module (15) increases or decreases the threshold value (Vth, Th) by an increment (Dth) according to whether the sign (SDN) of the difference is respectively positive or negative. Application in particular to systems for transmitting digital data at high bit rates over optical connections.

    摘要翻译： 该装置包括判定电路（6a），用于通过将接收的调制信号（Sr）的幅度与判定阈值（Vth，Th）进行比较来提供分别表示第一和第二二进制值的两个状态的二进制信号（Sb） 分别对应于接收信号的低和高值。 在连续时间段期间激活的计数模块（12）计算表示分别具有第二二进制值和第二二进制值的二进制信号的两个比特数之间的代数差的差分数值（DN，SDN）。 在每个时间段结束时，根据差值的符号（SDN）是否分别为正或负，调整模块（15）将阈值（Vth，Th）增加或减小增量（Dth）。 特别适用于通过光学连接以高比特率传输数字数据的系统。

    Analog-to-digital converter with a decision circuit and an optimized decision threshold
    2.
    发明申请
    Analog-to-digital converter with a decision circuit and an optimized decision threshold 失效
    具有决策电路和优化决策阈值的模数转换器

    公开(公告)号：US20060140306A1

    公开(公告)日：2006-06-29

    申请号：US11313908

    申请日：2005-12-22

    申请人： Arnaud Bisson ,  Omar Ait Sab

    发明人： Arnaud Bisson ,  Omar Ait Sab

    IPC分类号： H04L27/22

    CPC分类号： H04L25/063 ,  H03K5/086

    摘要： The device includes a decision circuit (6a) for providing, by comparing the amplitude of a received modulated signal (Sr) to a decision threshold (Vth, Th), a binary signal (Sb) with two states respectively representing first and second binary values that respectively correspond to low and high values of the received signal. A counting module (12) activated during successive time periods calculates a differential numerical value (DN, SDN) representing the algebraic difference between the two numbers of bits of the binary signal that respectively have the second binary value and the first binary value. At the end of each time period, an adjustment module (15) increases or decreases the threshold value (Vth, Th) by an increment (Dth) according to whether the sign (SDN) of the difference is respectively positive or negative. Application in particular to systems for transmitting digital data at high bit rates over optical connections.

    摘要翻译： 该装置包括用于通过将接收的调制信号（Sr）的幅度与判定阈值（Vth，Th）进行比较来提供具有两个状态的二进制信号（Sb）的判定电路（6a），分别表示第一和第二二进制 分别对应于接收信号的低和高值的值。 在连续时间段期间激活的计数模块（12）计算表示分别具有第二二进制值和第二二进制值的二进制信号的两个比特数之间的代数差的差分数值（DN，SDN）。 在每个时间段结束时，根据差值的符号（SDN）是否分别为正或负，调整模块（15）将阈值（Vth，Th）增加或减小增量（Dth）。 特别适用于通过光学连接以高比特率传输数字数据的系统。