公开(公告)号：US07036114B2

公开(公告)日：2006-04-25

申请号：US10113005

申请日：2002-03-29

申请人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Derek E. Pappas ,  Oyekunle A. Olukotun ,  Jeffrey M. Broughton ,  David R. Emberson ,  William kwei-cheung Lam ,  Liang T. Chen ,  Ihao Chen ,  Earl T. Cohen ,  Michael W. Parkin

发明人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Derek E. Pappas ,  Oyekunle A. Olukotun ,  Jeffrey M. Broughton ,  David R. Emberson ,  William kwei-cheung Lam ,  Liang T. Chen ,  Ihao Chen ,  Earl T. Cohen ,  Michael W. Parkin

IPC分类号： G06F9/45

CPC分类号： G06F17/5022 ,  G06F2217/68

摘要： A computer system for cycle-based computation includes a processor array, a translation component adapted to translate a cycle-based design, a host computer operatively connected to the processor array and to the translation component, a data connection component interconnecting a plurality of members of the processor array using static routing, a synchronization component enabling known timing relationships among the plurality of members of the processor array, a host service request component adapted to send a host service request from a member of the processor array to the host computer, and an access component adapted to access a portion of a state of the processor array and a portion of a state of the data connection.

公开(公告)号：US07043596B2

公开(公告)日：2006-05-09

申请号：US10113060

申请日：2002-03-29

申请人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Michael W. Parkin ,  Oyekunle A. Olukotun ,  Derek E. Pappas ,  Jeffrey M. Broughton ,  David R. Emberson ,  David S. Allison ,  Ashley N. Saulsbury ,  Earl T. Cohen ,  Nyles I. Nettleton ,  James B. Burr ,  Liang T. Chen

发明人： Thomas M. McWilliams ,  Jeffrey B. Rubin ,  Michael W. Parkin ,  Oyekunle A. Olukotun ,  Derek E. Pappas ,  Jeffrey M. Broughton ,  David R. Emberson ,  David S. Allison ,  Ashley N. Saulsbury ,  Earl T. Cohen ,  Nyles I. Nettleton ,  James B. Burr ,  Liang T. Chen

IPC分类号： G06F13/00 ,  H04L12/28

CPC分类号： G06F17/5022 ,  G06F15/8023 ,  H04L49/10 ,  H04L49/101

摘要： A method and apparatus for computation is provided. A main cluster crossbar is connected to a plurality of statically scheduled routing processors. A first sub-cluster crossbar is associated with a first one of the plurality of statically scheduled routing processors where the first sub-cluster crossbar is connected to a first plurality of execution processors. A second sub-cluster crossbar is associated with a second one of the plurality of statically scheduled routing processors where the second sub-cluster crossbar is connected to a second plurality of execution processors.