-
公开(公告)号：US09177089B2
公开(公告)日：2015-11-03
申请号：US14474280
申请日：2014-09-01
CPC分类号： G06F17/5045 , G06F17/504
摘要： A computer-implemented method and non-transitory computer readable medium for circuit design verification. Formal verification is performed on a circuit design to prove a correctness of a property of the circuit design. The circuit design has a cone of influence representing a portion of the circuit design capable of affecting signals of the property. A proof core of the circuit design is identified, the proof core being a portion of the cone of influence that is sufficient to prove the correctness of the property. A coverage metric is generated that is indicative of a level of formal verification coverage provided by the property based on the proof core of the circuit design.
摘要翻译： 一种用于电路设计验证的计算机实现的方法和非暂时性计算机可读介质。 对电路设计进行正式验证，以证明电路设计的属性的正确性。 电路设计具有代表电路设计能够影响该特性的信号的一部分的影响锥。 识别电路设计的核心，防爆核心是足以证明属性正确性的影响力的一部分。 产生一个覆盖度量，其指示由基于电路设计的验证核心的属性提供的形式验证覆盖水平。
-
公开(公告)号：US20150135150A1
公开(公告)日：2015-05-14
申请号：US14474280
申请日：2014-09-01
IPC分类号： G06F17/50
CPC分类号： G06F17/5045 , G06F17/504
摘要： A computer-implemented method and non-transitory computer readable medium for circuit design verification. Formal verification is performed on a circuit design to prove a correctness of a property of the circuit design. The circuit design has a cone of influence representing a portion of the circuit design capable of affecting signals of the property. A proof core of the circuit design is identified, the proof core being a portion of the cone of influence that is sufficient to prove the correctness of the property. A coverage metric is generated that is indicative of a level of formal verification coverage provided by the property based on the proof core of the circuit design.
摘要翻译： 一种用于电路设计验证的计算机实现的方法和非暂时性计算机可读介质。 对电路设计进行正式验证，以证明电路设计的属性的正确性。 电路设计具有代表电路设计能够影响该特性的信号的一部分的影响锥。 识别电路设计的核心，防爆核心是足以证明属性正确性的影响力的一部分。 产生一个覆盖度量，其指示由基于电路设计的验证核心的属性提供的形式验证覆盖水平。
-
搜索结果
2 条记录 (耗时 0.01 秒)
