Method of manufacturing a semiconductor device
    1.
    发明授权
    Method of manufacturing a semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号:US06579792B2

    公开(公告)日:2003-06-17

    申请号:US09864127

    申请日:2001-05-24

    IPC分类号: H01L2144

    摘要: The invention relates to a method of manufacturing a semiconductor device, comprising the provision of a substrate (1) having a dielectric layer (2) on this substrate (1), a conductive layer (3) on the dielectric layer (2), an inorganic anti-reflection coating (4) on the conductive layer (3), and a resist mask (6) on the inorganic anti-reflection coating (4). The method further comprises the following steps: patterning the inorganic anti-reflection coating (4) by means of the resist mask (6), patterning the conductive layer (3) by etching down to the dielectric layer (2), removing the resist mask (6), and removing the inorganic anti-reflection coating (4). According to the invention, the inorganic anti-reflection coating (4) is removed by means of a dry etch, using a polymerizing gas. It is achieved by this that no or hardly any changes in the critical dimension will occur.

    摘要翻译: 本发明涉及一种制造半导体器件的方法,包括在该衬底(1)上提供具有电介质层(2)的衬底(1),介电层(2)上的导电层(3), 在导电层(3)上的无机抗反射涂层(4)和无机防反射涂层(4)上的抗蚀剂掩模(6)。 该方法还包括以下步骤:通过抗蚀剂掩模(6)对无机抗反射涂层(4)进行图案化,通过向下蚀刻到电介质层(2)来图案化导电层(3),除去抗蚀剂掩模 (6),并除去无机防反射涂层(4)。 根据本发明,通过使用聚合气体的干蚀刻除去无机抗反射涂层(4)。 通过这一点可以实现,临界尺寸不会发生或几乎不发生任何变化。

    Two layer liner for dual damascene via
    2.
    发明授权
    Two layer liner for dual damascene via 有权
    双层镶嵌双层衬垫

    公开(公告)号:US06613668B2

    公开(公告)日:2003-09-02

    申请号:US09811638

    申请日:2001-03-19

    IPC分类号: H01L214763

    摘要: The invention relates to a semiconductor device having a substrate (1) for instance silicon, with a layer (2, 4) of at least organic material which contains a passage (6, 8) to the substrate (1). The passage (6,8) has walls (7, 9) transverse to the layer (2, 4). A metal layer (11) is applied on the substrate (1) in at least that portion which adjoins the passage (8). The organic material forming the walls (7, 9) of the passage (6, 8) is covered with an oxide liner (12), and the passage (6, 8) is filled with a metal (14). According to the invention, a metal liner (13) of Ti or Ta is provided between the oxide liner (12) and the metal (14) filling the passage (6, 8). It is achieved by this that the device has a better barrier between the organic material (2, 4) and the interconnection metal (14) and that the organic material (2, 4) has a better protection during the various steps of the process.

    摘要翻译: 本发明涉及具有例如硅的衬底(1)的半导体器件,其中至少有机材料的层(2,4)包含到衬底(1)的通道(6,8)。 通道(6,8)具有横向于层(2,4)的壁(7,9)。 至少在与通道(8)相邻的部分中,在基板(1)上施加金属层(11)。 形成通道(6,8)的壁(7,9)的有机材料被氧化物衬垫(12)覆盖,并且通道(6,8)填充有金属(14)。 根据本发明,在氧化物衬垫(12)和填充通道(6,8)的金属(14)之间设置有Ti或Ta的金属衬垫(13)。 由此实现了该装置在有机材料(2,4)和互连金属(14)之间具有更好的屏障,并且有机材料(2,4)在该工艺的各个步骤期间具有更好的保护。

    Method of manufacturing a two layer liner for dual damascene vias
    3.
    发明授权
    Method of manufacturing a two layer liner for dual damascene vias 失效
    制造用于双重镶嵌通孔的双层衬垫的方法

    公开(公告)号:US06667236B2

    公开(公告)日:2003-12-23

    申请号:US10462845

    申请日:2003-06-16

    IPC分类号: H01L214763

    摘要: The invention relates to a semiconductor device comprising a substrate (1) comprising for instance silicon with thereon a layer (2, 4) comprising at least organic material which contains a passage (6, 8) to the substrate (1). The passage (6,8) has walls (7, 9) transverse to the layer (2, 4). A metal layer (11) is applied on the substrate (1) in at least that portion which adjoins the passage (8). The organic material forming the walls (7, 9) of the passage (6, 8) is covered with an oxide liner (12), and the passage (6, 8) is filled with a metal (14). According to the invention, a metal liner (13) comprising Ti or Ta is provided between the oxide liner (12) and the metal (14) filling the passage (6, 8). It is achieved by this that the device has a better barrier between the organic material (2, 4) and the interconnection metal (14) and that the organic material (2, 4) has a better protection during the various steps of the process.

    摘要翻译: 本发明涉及一种包括衬底(1)的半导体器件,衬底(1)包括例如硅,其上具有至少包含到衬底(1)的通道(6,8)的有机材料的层(2,4))的层。 通道(6,8)具有横向于层(2,4)的壁(7,9)。 至少在与通道(8)相邻的部分中,在基板(1)上施加金属层(11)。 形成通道(6,8)的壁(7,9)的有机材料被氧化物衬垫(12)覆盖,并且通道(6,8)填充有金属(14)。 根据本发明,在氧化物衬垫(12)和填充通道(6,8)的金属(14)之间设置包含Ti或Ta的金属衬垫(13)。 由此实现了该装置在有机材料(2,4)和互连金属(14)之间具有更好的屏障,并且有机材料(2,4)在该工艺的各个步骤期间具有更好的保护。