公开(公告)号：US06835969B1

公开(公告)日：2004-12-28

申请号：US10606820

申请日：2003-06-26

申请人： Philbert F. Marsh ,  Colin S. Whelan ,  William E. Hoke

发明人： Philbert F. Marsh ,  Colin S. Whelan ,  William E. Hoke

IPC分类号： H01L29/778

CPC分类号： H01L29/7784

摘要： A transistor structure having an gallium arsenide (GaAs) semiconductor substrate; a lattice match layer; an indium aluminum arsenide (InAlAs) barrier layer disposed over the lattice match layer; an InyGa1-yAs lower channel layer disposed on the barrier layer, where y is the mole fraction of In content in the lower channel layer; an InxGa1-xAs upper channel layer disposed on the lower channel layer, where x is the mole fraction of In content in the upper channel layer and where x is different from y; and an InAlAs Schottky layer on the InxGa1-xAs upper channel layer. The lower channel layer has a bandgap greater that the bandgap of the upper channel layer. The lower channel layer has a bulk electron mobility lower than the bulk electron mobility of the upper channel layer where.

摘要翻译： 具有砷化镓（GaAs）半导体衬底的晶体管结构; 一个格子匹配层; 设置在晶格匹配层上的铟铝砷化物（InAlAs）阻挡层; 设置在阻挡层上的InyGa1-yAs下通道层，其中y是下通道层中In含量的摩尔分数; 设置在下沟道层上的In x Ga 1-x As上沟道层，其中x是上沟道层中In含量的摩尔分数，其中x不同于y; 以及In x Ga 1-x As上沟道层上的InAlAs肖特基层。 下通道层的带隙大于上通道层的带隙。 下沟道层的体电子迁移率低于上沟道层的体电子迁移率。