公开(公告)号：US06202191B1

公开(公告)日：2001-03-13

申请号：US09333604

申请日：1999-06-15

申请人： Ronald G. Filippi ,  Phillip C. Lin ,  Thomas M. Shaw ,  Richard A. Wachnik

发明人： Ronald G. Filippi ,  Phillip C. Lin ,  Thomas M. Shaw ,  Richard A. Wachnik

IPC分类号： G06F1750

CPC分类号： H01L21/76858 ,  G06F17/5077 ,  H01L21/76841 ,  H01L21/7685 ,  H01L23/5286 ,  H01L23/53223 ,  H01L2924/0002 ,  H01L2924/00

摘要： Method for forming a novel power grid structure for integrated circuit semiconductor chip devices that exhibits increased electromigration resistance by including diffusion blocking interlevel contacts and employing a regular array of conducting line elements with “phase shift” between adjacent tracks of segmented power busses. The novel grid structure includes a first metal layer including a first set of conducting line segments that are substantially parallel to one another and run in a first direction; a layer of diffusion blocking dielectric insulation above the first layer; a second metal layer including a second set of conducting line segments substantially parallel to each other and running in a second direction orthogonal to the first direction; and, interlevel contact studs disposed substantially vertically through the diffusion blocking dielectric insulation layer for electrically connecting aligned line segments of the first and second sets, wherein each segment of the first and second sets of line segments is limited to a predetermined length by a diffusion blocking boundary.

摘要翻译： 用于形成用于集成电路半导体芯片器件的新型电网结构的方法，其通过包括扩散阻挡层间接触并采用在分段功率总线的相邻轨道之间具有“相移”的导线组件的规则阵列来表现出增加的电迁移阻力。 新颖的栅格结构包括第一金属层，其包括基本上彼此平行并沿第一方向延伸的第一组导线段; 在第一层之上的一层扩散阻挡介电绝缘层; 第二金属层，包括基本上彼此平行并沿与第一方向正交的第二方向延伸的第二组导线段; 以及穿过所述扩散阻挡介电绝缘层基本垂直设置的层间接触柱，用于电连接所述第一和第二组的对准的线段，其中所述第一和第二组线段的每个段通过扩散阻挡被限制到预定长度 边界。