公开(公告)号：US5724483A

公开(公告)日：1998-03-03

申请号：US470184

申请日：1995-06-07

申请人： Rizzotto Gianguido ,  Poluzzi Rinaldo ,  Andrea Pagni

发明人： Rizzotto Gianguido ,  Poluzzi Rinaldo ,  Andrea Pagni

IPC分类号： G05B13/02 ,  G06F9/44 ,  G06G7/12 ,  G06N7/02 ,  G06N7/04 ,  G06F15/18

CPC分类号： G05B13/0275 ,  G06N7/04 ,  Y10S706/90

摘要： A fuzzy logic electronic controller whereby predetermined membership functions .mu.(x) of logic (X) variables are subjected to so-called inference operations configured essentially as IF-THE rules with at least one front preposition and at least one rear implication. The controller is of a kind which includes an input or fuzzyfier section having a plurality of inputs for analog or digital signals, a central control unit or fuzzy controller core placed after said input section and being provided with memories, and an output section or defuzzyfier connected to the output of the central unit to convert the results of the inference operations back to analog or digital signals. The controller includes a plurality of fuzzyfiers being disposed in parallel within the input section and each connected to a pair of analog and digital inputs, a plurality of storage modules corresponding in number to said fuzzyfiers and containing data of the front prepositions only of said rules, a fuzzy controller inference unit active in the central control unit to carry out logic operations based on the inference rules of the fuzzy logic by extracting data from said memories through an interfacing circuit, and an additional memory coupled between the fuzzy controller inference unit and the defuzzyfier and adapted to contain data pertaining to the rear (THEN) implications only of said inference rules.

摘要翻译： 模糊逻辑电子控制器，其中逻辑（X）变量的预定隶属函数mu（x）经受所谓的推理操作，所述推理操作基本上被配置为具有至少一个前介词和至少一个后置含义的IF-The规则。 控制器是一种包括具有用于模拟或数字信号的多个输入的输入或模糊部分，放置在所述输入部分之后并设置有存储器的中央控制单元或模糊控制器核心，以及连接到输出部分或模糊控制器 到中央单元的输出以将推理操作的结果转换回模拟或数字信号。 控制器包括在输入部分内并联设置的多个模糊器，每个模糊器连接到一对模拟和数字输入端，多个存储模块数量对应于所述模糊器并且仅包含所述规则的前置介面的数据， 一个模糊控制器推理单元，主动在中央控制单元中，通过一个接口电路从所述存储器提取数据，并通过耦合在模糊控制器推理单元和defuzzyfier之间的附加存储器，基于模糊逻辑的推理规则执行逻辑运算 并且适于仅包含与所述推理规则有关的后（THEN）影响的数据。