公开(公告)号：US07675806B2

公开(公告)日：2010-03-09

申请号：US11435942

申请日：2006-05-17

Applicant: Bradford Hunter ,  David Burnett ,  Troy Cooper ,  Prashant Kenkare ,  Ravindraj Ramaraju ,  Andrew Russell ,  Shayan Zhang ,  Michael Snyder

Inventor： Bradford Hunter ,  David Burnett ,  Troy Cooper ,  Prashant Kenkare ,  Ravindraj Ramaraju ,  Andrew Russell ,  Shayan Zhang ,  Michael Snyder

IPC: G11C5/14

CPC classification number: G11C5/143 ,  G11C5/147

Abstract: A device is disclosed having a low-voltage memory device. The device includes a first memory having a first memory topology and a second memory having a second memory topology, with both memories located in an integrated circuit. The first memory is a relatively high-density memory device, capable of storing large amounts of data relative to the second memory. The second memory is a low-voltage memory device capable of being accessed at low-voltages relative to the voltage at which the first memory can be accessed. Accordingly, the second memory is accessible when the integrated circuit is placed in a low-voltage mode of operation, which may represent a data retention state (sleep state) for the first memory or other portions of the integrated circuit. Thus, the device is able to store large amounts of data in the high density memory in a normal or active mode of operation, and also have access to the low-voltage memory during the low-voltage mode of operation.

Abstract translation: 公开了一种具有低电压存储器件的器件。 该设备包括具有第一存储器拓扑的第一存储器和具有第二存储器拓扑的第二存储器，其中两个存储器位于集成电路中。 第一存储器是相对高密度存储器件，能够存储相对于第二存储器的大量数据。 第二存储器是能够相对于可以访问第一存储器的电压的低电压访问的低电压存储器件。 因此，当集成电路处于低电压工作模式时，第二存储器可访问，这可以表示第一存储器或集成电路的其它部分的数据保持状态（睡眠状态）。 因此，该器件能够在正常或主动操作模式下将大量数据存储在高密度存储器中，并且还可以在低电压操作模式期间访问低电压存储器。

公开(公告)号：US20070280026A1

公开(公告)日：2007-12-06

申请号：US11435942

申请日：2006-05-17

Applicant: Bradford Hunter ,  David Burnett ,  Troy Cooper ,  Prashant Kenkare ,  Ravindraj Ramaraju ,  Andrew Russel ,  Shayan Zhang ,  Michael Snyder

Inventor： Bradford Hunter ,  David Burnett ,  Troy Cooper ,  Prashant Kenkare ,  Ravindraj Ramaraju ,  Andrew Russel ,  Shayan Zhang ,  Michael Snyder

IPC: G11C5/14

CPC classification number: G11C5/143 ,  G11C5/147

Abstract: A device is disclosed having a low-voltage memory device. The device includes a first memory having a first memory topology and a second memory having a second memory topology, with both memories located in an integrated circuit. The first memory is a relatively high-density memory device, capable of storing large amounts of data relative to the second memory. The second memory is a low-voltage memory device capable of being accessed at low-voltages relative to the voltage at which the first memory can be accessed. Accordingly, the second memory is accessible when the integrated circuit is placed in a low-voltage mode of operation, which may represent a data retention state (sleep state) for the first memory or other portions of the integrated circuit. Thus, the device is able to store large amounts of data in the high density memory in a normal or active mode of operation, and also have access to the low-voltage memory during the low-voltage mode of operation.

Abstract translation: 公开了一种具有低电压存储器件的器件。 该设备包括具有第一存储器拓扑的第一存储器和具有第二存储器拓扑的第二存储器，其中两个存储器位于集成电路中。 第一存储器是相对高密度存储器件，能够存储相对于第二存储器的大量数据。 第二存储器是能够相对于可以访问第一存储器的电压的低电压访问的低电压存储器件。 因此，当集成电路处于低电压工作模式时，第二存储器可访问，这可以表示第一存储器或集成电路的其它部分的数据保持状态（睡眠状态）。 因此，该设备能够在正常或主动操作模式下将大量数据存储在高密度存储器中，并且还可以在低电压操作模式期间访问低电压存储器。