公开(公告)号：US5065454A

公开(公告)日：1991-11-12

申请号：US516773

申请日：1990-04-30

申请人： Reiner Binz ,  Hartmut Burghardt

发明人： Reiner Binz ,  Hartmut Burghardt

IPC分类号： H04L7/00

CPC分类号： H04L7/0075 ,  H04L7/0083

摘要： In a digital switching center for a telephone switching system or the like, a clock signal distribution arrangement having a redundant central clock generator supplying clock signals to the switching matrices the arrangement including electro-optical transducers, brancher modules, light conductors and opto-electrical transducers connected in signal distribution paths between the clock generator and the switching matrices. The distribution paths are doubled for redundancy purposes.

摘要翻译： 在用于电话交换系统等的数字交换中心中，具有冗余中心时钟发生器的时钟信号分配装置提供给开关矩阵的时钟信号，包括电光换能器，分支器模块，光导体和光电换能器 连接在时钟发生器和开关矩阵之间的信号分配路径中。 出于冗余目的，分配路径加倍。

公开(公告)号：US4512014A

公开(公告)日：1985-04-16

申请号：US175692

申请日：1980-08-06

申请人： Reiner Binz ,  Norbert Pointner

发明人： Reiner Binz ,  Norbert Pointner

IPC分类号： H04J3/24 ,  H04L12/52 ,  H04Q11/04 ,  H04Q11/08 ,  H04J3/02

CPC分类号： H04L12/52 ,  H04Q11/08

摘要： A time slot multiplex device for a time division multiplex system having a voice memory for storing data words received on an input multiplex line, and a control memory for controlling the reading of said voice memory to an output multiplex line, incorporates logic circuitry for generating a plurality of associated pairs of addresses, one for said control memory and one for said voice memory, corresponding to a plurality of equally spaced time slots for a multi-channel connection to said output multiplex line of relatively high band width, in response to a single pair of associated addresses furnished by a higher ranking control means and a logic circuit which, in association with a time slot counter, generates the required addresses during cycling of the time slot counter through a single frame of the time division multiplex system.

摘要翻译： 一种用于时分复用系统的时隙多路复用装置，具有用于存储在输入多路复用线路上接收的数据字的语音存储器和用于控制所述语音存储器到输出多路复用线路的读取的控制存储器，其包括用于产生 多个相关联的地址对，一个用于所述控制存储器，一个用于所述语音存储器，对应于多个相等间隔的时隙，用于响应于单个的相对较高带宽的所述输出多路复用线路的多通道连接 由较高等级控制装置提供的一对关联地址和与时隙计数器相关联的逻辑电路通过时分复用系统的单个帧在时隙计数器的循环期间产生所需的地址。

公开(公告)号：US4482995A

公开(公告)日：1984-11-13

申请号：US345596

申请日：1982-02-04

申请人： Reiner Binz ,  Eberhard Knorpp ,  Frithjof von Sichart

发明人： Reiner Binz ,  Eberhard Knorpp ,  Frithjof von Sichart

IPC分类号： H04Q11/04 ,  H04Q11/08 ,  H04J3/00

CPC分类号： H04Q11/08

摘要： In a time-division multiplex switching network unit for time-space switching which operates employing an information memory which has information input thereto in a cyclic manner and read therefrom in a random fashion, the number of terminals is limited, in particular, by the fact that during random output it is not possible to exceed a specific speed. Higher number of terminals are achieved in that the switching network units are composed of modules whose corresponding inputs are connected to one another and into which, during each pulse frame, more PCM words are input than are output. In this manner, the reading frequency is kept low, although, because of the multiple connection at the input end, blocking-free switch-through is provided.

摘要翻译： 在用于时间空间切换的时分复用交换网络单元中，其采用信息存储器，该信息存储器具有以循环方式输入的信息并以随机方式从其读取，终端数量受到限制 在随机输出期间，不可能超过特定速度。 实现更高数量的终端，其中交换网络单元由相应输入彼此连接的模块组成，并且在每个脉冲帧期间输入比输出更多的PCM字。 以这种方式，读取频率保持较低，尽管由于输入端的多重连接，提供无阻塞的切换。

公开(公告)号：US4002839A

公开(公告)日：1977-01-11

申请号：US581376

申请日：1975-05-27

申请人： Otto Karl ,  Reiner Binz

发明人： Otto Karl ,  Reiner Binz

IPC分类号： H04J3/06 ,  H04Q11/04

CPC分类号： H04J3/0676 ,  H04Q11/04

摘要： A method and apparatus for synchronizing clock oscillators in each of the exchange installations (network nodes) of a PCM/TDM telecommunication network is described. A frequency divider in each network node receives pulses from a clock generator at that node, and frequency dividers are provided for receiving clock pulses from other exchangers on incoming trunks. The incoming trunk frequency dividers are caused to operate with a phase displacement of 180.degree. relative to the clock generator in the exchange. The outputs from the incoming trunk frequency dividers and the exchange clock frequency divider are coupled to phase discriminators. The phase discriminator outputs are coupled through a sum or mean value producing element to produce a control signal for adjusting the frequency of the exchange clock oscillator. Reference phase regeneration is initiated as a result of frequency drift from the oscillator no-load frequency, which drift exceeds a predetermined value.

摘要翻译： 描述了用于在PCM / TDM电信网络的每个交换设备（网络节点）中同步时钟振荡器的方法和装置。 每个网络节点中的分频器从该节点处的时钟发生器接收脉冲，并且提供分频器用于从输入干线上的其他交换器接收时钟脉冲。 引入干线分频器在交换中相对于时钟发生器的相位偏移为180°。 来自干线分频器和交换时钟分频器的输出端耦合到相位鉴相器。 相位鉴别器输出通过和或平均值产生元件耦合以产生用于调整交换时钟振荡器频率的控制信号。 参考相位再生由于振荡器空载频率的频率偏移而发生，该漂移超过预定值。

公开(公告)号：US4455648A

公开(公告)日：1984-06-19

申请号：US345595

申请日：1982-02-04

申请人： Reiner Binz ,  Eberhard Knorpp ,  Frithjof von Sichart

发明人： Reiner Binz ,  Eberhard Knorpp ,  Frithjof von Sichart

IPC分类号： H04Q11/04 ,  H04Q11/08 ,  H04J3/00

CPC分类号： H04Q11/08

摘要： In switching network units which operate employing an information memory featuring cyclic input and random reading, the number of connections is particularly limited by the fact that during random reading it is not possible to exceed a specific speed. They are normally designed in such a manner that, to a full extent, they can effect both time-wise switching and spatial switching. In these units, the speed restriction during random reading means that the number of connections normally cannot exceed a certain value. Moreover, the facility of time channel conversion to a full extent in units of central switching stages represents an unnecessary expense. Such units are therefore constructed from a plurality of identical modules whose equivalent inputs are connected to one another and into which, during each pulse frame, more PCM words are input than PCM words are stored therein or can be read in random therefrom. Therefore, the time shifts which can be achieved serve primarily for purposes of spatial assignment, although the expense in comparison to the full time-spatial switching units is lower and a larger number of incoming lines can be connected without exceeding the permissible reading speeds.

摘要翻译： 在采用具有循环输入和随机读取的信息存储器操作的交换网络单元中，连接数特别受到以下事实的限制，即在随机读取期间不可能超过特定速度。 它们通常以这样一种方式进行设计，即在一定程度上它们可以实现时间切换和空间切换。 在这些单元中，随机读取期间的速度限制意味着连接数通常不能超过一定值。 此外，以中央交换阶段为单位的时间通道转换的设施代表不必要的费用。 因此，这样的单元由多个相同的模块构成，其等效输入彼此连接，并且在每个脉冲帧期间输入比PCM字存储更多的PCM字，或者随机读取PCM字。 因此，尽管与全时空交换单元相比的费用较低，可以连接更多数量的输入线而不超过允许的读取速度，但是可以实现的时间偏移主要用于空间分配。

公开(公告)号：US4355386A

公开(公告)日：1982-10-19

申请号：US933412

申请日：1978-08-14

申请人： Reiner Binz ,  Otto Karl

发明人： Reiner Binz ,  Otto Karl

IPC分类号： H04L7/00 ,  H04J3/06 ,  H04Q11/04 ,  H04J3/14

CPC分类号： H04J3/0676 ,  H04J3/0688 ,  H04Q11/04

摘要： In a time-division multiplex digital switching system as for example for PCM telephone exchange utilizing duplicate field installations, the exchange clock pulse generating arrangement is provided in duplicate for the purpose of clock pulse or frequency supply of said coupling field installations, and one arrangement is phase synchronized by the other master frequency determining unit and one exchange clock pulse generating portion supplies one coupling field half in each instance, and the other supplies the other half. The functions of the exchange clock pulse generating portions can be entirely or completely interchanged, as for example, when faults or failures appear in certain portions of the equipment.

摘要翻译： 在例如用于利用重复现场安装的PCM电话交换的时分复用数字交换系统中，交换时钟脉冲发生装置为了所述耦合现场设备的时钟脉冲或频率供应的目的而重复提供，并且一种布置是 由另一个主频率确定单元和一个交换时钟脉冲产生部分进行相位同步，在每个实例中提供一个耦合场一半，另一个提供另一个。 交换时钟脉冲产生部分的功能可以完全或完全互换，例如当故障或故障出现在设备的某些部分时。