公开(公告)号：US10904141B2

公开(公告)日：2021-01-26

申请号：US16240398

申请日：2019-01-04

申请人： Huawei Technologies Co., Ltd.

发明人： Zongpeng Du ,  Guoyi Chen ,  Jie Dong ,  Xinyuan Wang ,  Jun Gong

IPC分类号： H04Q3/68 ,  H04L12/741 ,  H04L12/721 ,  H04L29/02 ,  H04L12/52 ,  H04J3/16 ,  H04L12/46 ,  G06K7/01 ,  H04L12/417 ,  H04L12/715

摘要： A data sending method, where the method includes receiving, by a forwarding device using a first flexible Ethernet (FlexE) group and in multiple timeslots included in a first timeslot set, multiple first encoded data blocks from a physical coding sublayer (PCS), determining, by the forwarding device according to the timeslots included in the first timeslot set and the first FlexE group, a second FlexE group and multiple timeslots included in a second timeslot set, and sending, by the forwarding device, the first encoded data blocks using the second FlexE group and in the timeslots included in the second timeslot set. The forwarding device does not need to process the first encoded data blocks in a conventional layer 2 or layer 3 forwarding mode. Therefore, a processing delay can be reduced, and a transmission delay can be reduced.

公开(公告)号：US09755857B2

公开(公告)日：2017-09-05

申请号：US14649162

申请日：2012-12-03

申请人： SELEX GALILEO S.P.A.

发明人： Massimo Traversone ,  Mauro Luoni

IPC分类号： H04L12/52 ,  H04L12/40 ,  H04L12/46 ,  H04L12/931 ,  H04J3/06

CPC分类号： H04L12/52 ,  H04J3/0658 ,  H04L12/40189 ,  H04L12/4625 ,  H04L49/351 ,  H04L2012/4028

摘要： An avionics switched full-duplex Ethernet communication Arinc 664p7 network (100) includes at least two independent elementary networks (N1, N2). Each elementary network includes one or more end systems (ESI) suitable to act as source end systems for data frames transmitted over the network, and one or more end systems (ES4) suitable to act as destination end systems for such data frames. Each elementary network further includes a switching function block (SW1, SW2) connected between the source (ESI) and destination (ES4) end systems. The Ethernet network is has one of the source (ESI), destination (ES4) end systems and the switching function block (SW1, SW2) includes timers (204) suitable to generate a common piece of timing information to be sent to the other devices of the elementary network in-order to enable the transmission of the data frames over the elementary network by one of the source end systems (ESI).

公开(公告)号：US08767578B2

公开(公告)日：2014-07-01

申请号：US13326822

申请日：2011-12-15

申请人： Wooram Shin ,  Hyun-jae Kim ,  Anseok Lee ,  Keun Young Kim ,  Kwang Jae Lim ,  Dong Seung Kwon

发明人： Wooram Shin ,  Hyun-jae Kim ,  Anseok Lee ,  Keun Young Kim ,  Kwang Jae Lim ,  Dong Seung Kwon

IPC分类号： H04L12/52

CPC分类号： H04W72/1278 ,  H04W48/08 ,  H04W74/008 ,  H04W84/18

摘要： In an orthogonal frequency division multiple access (OFDMA)-based wireless mesh network, a communication node receives information regarding a next transmission time of a 1-hop node and a 2-hop node through the 1-hop node, calculates next transmission intervals of the 1-hop node and the 2-hop node, determines a next transmission time of the communication node by using the next transmission intervals of the 1-hop node and the 2-hop node, and then transmits, to an 1-hop node of the communication node, the information of the next transmission time together with the information of the transmission time of the 1-hop node, received from the 1-hop node.

摘要翻译： 在基于正交频分多址（OFDMA）的无线网状网络中，通信节点通过1跳节点接收关于1跳节点和2跳节点的下一个传输时间的信息，计算下一个传输间隔 1跳节点和2跳节点通过使用1跳节点和2跳节点的下一个传输间隔来确定通信节点的下一个传输时间，然后发送到1跳节点 通信节点的信息，下一个传输时间的信息以及从1跳节点接收的1跳节点的传输时间的信息。

公开(公告)号：US20130343226A1

公开(公告)日：2013-12-26

申请号：US13980016

申请日：2012-01-05

申请人： Christopher Kenneth Holmes ,  Suraj Ajit ,  John Gardiner ,  Julian Frazer Ewert Johnson

发明人： Christopher Kenneth Holmes ,  Suraj Ajit ,  John Gardiner ,  Julian Frazer Ewert Johnson

IPC分类号： H04L12/52

CPC分类号： H04L69/08 ,  H04B7/18506 ,  H04B7/2643 ,  H04L12/52 ,  H04L61/2596

摘要： A method is disclosed of assessing timeslot interoperability between a first platform and a second platform communicating over a Time Division Multiple Access network. An exemplary method includes obtaining data representing a metamodel of communication characteristics of the first platform and the second platform, the metamodel including information regarding at least transmit timeslots for the first platform, and information regarding at least receive timeslots for the second platform. The method can be queried to assess interoperability between the transmit timeslots and the receive timeslots, for outputting timeslot interoperability data based on a result of the querying.

摘要翻译： 公开了一种评估在时分多址网络上通信的第一平台和第二平台之间的时隙互操作性的方法。 示例性方法包括获得表示第一平台和第二平台的通信特性的元模型的数据，元模型包括关于至少第一平台的发送时隙的信息，以及关于第二平台的至少接收时隙的信息。 可以查询该方法以评估发射时隙和接收时隙之间的互操作性，以便基于查询的结果来输出时隙互操作性数据。

公开(公告)号：US07457285B1

公开(公告)日：2008-11-25

申请号：US10901760

申请日：2004-07-28

申请人： Brent K. Parrish ,  Werner E. Niebel

发明人： Brent K. Parrish ,  Werner E. Niebel

IPC分类号： H04L12/52

CPC分类号： H04Q11/04 ,  H04Q2213/13103 ,  H04Q2213/13292 ,  H04Q2213/13299 ,  H04Q2213/1332 ,  H04Q2213/13322

摘要： In one embodiment, a switching system includes a backplane and multiple cards that each support multiple ASIC devices. Each ASIC device is associated with a subset of the network interfaces associated with the switching system. At least one ASIC device on a card may communicate switched data to an outgoing network interface associated with the card. Remaining ASIC devices on the card may communicate switched data to one or more other cards, using the backplane, for communication to one or more outgoing network interfaces associated with the other cards. In another embodiment, a device for switching data from a first bus to a second bus in a TDM switching system is provided. In another embodiment, a method for switching data between a plurality of network interfaces in a switching system is disclosed.

摘要翻译： 在一个实施例中，交换系统包括背板和多个卡，每个卡支持多个ASIC设备。 每个ASIC设备与与交换系统相关联的网络接口的子集相关联。 卡上的至少一个ASIC设备可以将切换的数据传送到与该卡相关联的输出网络接口。 卡上的剩余ASIC设备可以使用背板将交换数据传送到一个或多个其他卡，以便与一个或多个与其他卡相关联的输出网络接口进行通信。 在另一个实施例中，提供了一种用于在TDM交换系统中将数据从第一总线切换到第二总线的设备。 在另一实施例中，公开了一种用于在交换系统中的多个网络接口之间切换数据的方法。

公开(公告)号：US07304988B2

公开(公告)日：2007-12-04

申请号：US10402916

申请日：2003-03-28

申请人： Narendra K. Bansal

发明人： Narendra K. Bansal

IPC分类号： H04L12/52 ,  H04Q11/04

CPC分类号： H04Q11/0421 ,  H04Q2213/13076 ,  H04Q2213/13292 ,  H04Q2213/1332

摘要： A digital cross-connect switching system that has a single-stage architecture, a scalable bandwidth, and reduced connection memory storage requirements. The scalable bandwidth digital cross-connect switching system includes a plurality of digital cross-connect building blocks. Each digital cross-connect building block includes at least one cross-connect having a plurality of input ports and a plurality of output ports, at least one connection memory communicatively coupled to the cross-connect, and at least one OR gate. Bandwidth is scaled in the digital cross-connect switching system by interconnecting predetermined numbers of the digital cross-connect building blocks. In general, the size of the digital cross-connect switching system increases as the square of the bandwidth requirement.

摘要翻译： 具有单级架构，可扩展带宽和减少的连接存储器存储要求的数字交叉连接交换系统。 可扩展带宽数字交叉连接交换系统包括多个数字交叉连接构建块。 每个数字交叉连接构建块包括具有多个输入端口和多个输出端口的至少一个交叉连接器，至少一个通信地耦合到交叉连接的连接存储器以及至少一个或门。 通过互连预定数量的数字交叉连接构建块，数字交叉连接交换系统中的带宽被缩放。 一般来说，数字交叉连接交换系统的大小随着带宽要求的平方而增加。

公开(公告)号：US5604735A

公开(公告)日：1997-02-18

申请号：US440088

申请日：1995-05-12

申请人： Frank H. Levinson ,  Mark J. Farley ,  Minh Q. Vu ,  Calvin P.-K. Leung

发明人： Frank H. Levinson ,  Mark J. Farley ,  Minh Q. Vu ,  Calvin P.-K. Leung

IPC分类号： H04L12/52 ,  H04L12/56 ,  H04Q11/04

CPC分类号： H04L49/351 ,  H04L12/52 ,  H04L49/101 ,  H04L49/205 ,  H04L49/25 ,  H04L49/254

摘要： The present invention provides an improvement in circuit switching for a network comprising a switching apparatus including a plurality of transceivers for interfacing directly with a like plurality of nodes. Each of the transceivers has a receive and transmit through port for passing data to and from nodes. Transmitted data includes a connect/disconnect sequence, a first wait sequence, and user data. The switching apparatus further includes circuitry for isolating each transceiver so as to loop back data when not in use and a switching matrix for directly connecting any pair of transceivers. Each of the transceivers includes circuitry for detecting a connect and disconnect sequence and an interface for connection to a serial asynchronous receiver to derive node requests, routing data, priority and other information from the connect sequence detected at the transceiver. Derived switch configuration requests are processed by a node route control state machine, with each node route control state machine integrated in a bus architecture for configuring the matrix switch. A bus arbitration state machine controls the bus architecture servicing bus requests and providing bus grants for the transfer of routing information to switch control logic and a command sequencer. The requesting node may set a priority for a connection request, queue a connection request or alternatively request data from the switch controller micro-controller core.

摘要翻译： 本发明提供了一种用于网络的电路交换的改进，包括包括用于直接与相似多个节点进行接口的多个收发器的交换设备。 每个收发器具有接收和发送端口，用于将数据传送到节点和从节点传送数据。 发送的数据包括连接/断开序列，第一等待序列和用户数据。 开关装置还包括用于隔离每个收发器以便在不使用时回送数据的电路和用于直接连接任何一对收发器的交换矩阵。 每个收发器包括用于检测连接和断开序列的电路以及用于连接到串行异步接收器的接口，以从在收发器处检测到的连接序列导出节点请求，路由数据，优先级和其他信息。 派生交换机配置请求由节点路由控制状态机处理，每个节点路由控制状态机集成在总线架构中，用于配置矩阵切换。 总线仲裁状态机控制总线架构服务总线请求，并提供总线授权，用于将路由信息传输到交换机控制逻辑和命令定序器。 请求节点可以设置连接请求的优先级，对连接请求进行队列，或者替代地从交换机控制器微控制器核心请求数据。

公开(公告)号：US5570358A

公开(公告)日：1996-10-29

申请号：US373203

申请日：1995-03-10

申请人： Hannu Alatalo ,  Marko Kokko

发明人： Hannu Alatalo ,  Marko Kokko

IPC分类号： H04J3/00 ,  H04J3/16 ,  H04Q3/52 ,  H04Q11/04 ,  H04Q11/08 ,  H04L12/52 ,  H04L12/54

CPC分类号： H04Q11/08 ,  H04J3/1611 ,  H04Q11/0478 ,  H04J2203/0005 ,  H04J2203/0012

摘要： A method for implementing switching in the time or space domain, in which the switching is effected on the basis of switching data contained in an address control memory, and a basic switching block is defined on the basis of an incoming frame structure so that the number of its time slots corresponds to the greatest possible number of signals of the lowest level of hierarchy to be switched in the frame. The basic switching block recurs in the same form with respect to switching. In order for the switching to be simplified: (i) the number of the switching instructions to be stored in the address control memory corresponds to the size of the basic switching block, whereby when the basic switching block also contains higher-level signals, the same switching instruction is used in the address control memory at given intervals, depending on how the signals occur in the basic switching block, (ii) the same address control memory is read during the entire frame structure, whereby it gives a switching instruction to all time slots in the frame, and (iii) the switching instructions read from the address control memory are skipped during the time slots which are not cross-connected.

摘要翻译： PCT No.PCT / FI93 / 00292 Sec。 371 1995年3月10日 102（e）1995年3月10日PCT PCT 1993年7月8日PCT公布。 第WO94 / 03021号公报 日期1994年2月3日一种用于实现基于包含在地址控制存储器中的切换数据进行切换的时间或空间域中的切换的方法和基本切换块基于输入帧 使得其时隙的数量对应于帧中要切换的最低级别的最大可能数量的信号。 相对于切换，基本切换块以相同的形式重现。 为了简化切换：（i）要存储在地址控制存储器中的切换指令的数量对应于基本切换块的大小，由此当基本切换块还包含较高级别的信号时， 取决于信号如何在基本切换块中发生，在地址控制存储器中以给定的间隔使用相同的切换指令，（ii）在整个帧结构期间读取相同的地址控制存储器，从而给所有的切换指令 帧中的时隙，以及（iii）在未交叉连接的时隙期间跳过从地址控制存储器读取的切换指令。

公开(公告)号：US5485454A

公开(公告)日：1996-01-16

申请号：US937577

申请日：1992-08-28

申请人： Raymond Gass ,  Andre Ruhlmann

发明人： Raymond Gass ,  Andre Ruhlmann

IPC分类号： H04Q3/00 ,  H04Q11/04 ,  H04L12/52

CPC分类号： H04Q3/002 ,  H04Q11/04

摘要： In a system and method of communication between circuit mode units interconnected by point-to-point circuits in a subnetwork at the core of a communication installation the point-to-point circuits between units are structured and managed identically. A communication circuit is incorporated in each unit of the subnetwork, irrespective of the control unit, auxiliary unit or telephone and/or communication terminal interface controller type. This communication circuit handles the broadcasting over the point-to-point circuits to the other units of data from time-division multiplex circuits connected to it and switching of bytes addressed to it over the circuits.

摘要翻译： 在通信安装核心的子网中的点到点电路互连的电路模式单元之间的通信系统和方法中，单元之间的点对点电路被构造和管理相同。 无论控制单元，辅助单元或电话和/或通信终端接口控制器类型如何，都将通信电路并入子网的每个单元中。 该通信电路通过点到点电路处理从其连接的时分多路复用电路到其他数据单元的广播，以及通过电路转换到其上的字节。

公开(公告)号：US5450405A

公开(公告)日：1995-09-12

申请号：US42225

申请日：1993-04-02

申请人： John W. Maher ,  James C. Duran

发明人： John W. Maher ,  James C. Duran

IPC分类号： H04W84/08 ,  H04J3/12 ,  H04L12/18 ,  H04L12/52

CPC分类号： H04W84/08

摘要： When a group communication group call is initiated in a multi-site communication system, the communication processing information for that particular communication group call must be established. The communication processing information is formatted by a central controller which in turn transfers that information to a destination data base of a processing multiplexer switch. The information is then stored in the destination data base such that the particular communication group call may be quickly processed. When the communication unit that initiated the call ceases to transmit and another communication unit begins to transmit, the communication processing information is updated to reflect the change in the transmitting communication unit. This continues to happen until the particular communication group call has ended; once it has ended, the communication processing information is deleted from the destination data base.

摘要翻译： 当在多站点通信系统中启动组通信组呼叫时，必须建立该特定通信组呼叫的通信处理信息。 通信处理信息由中央控制器格式化，中央控制器又将该信息传送到处理复用器开关的目的地数据库。 然后将信息存储在目的地数据库中，使得可以快速处理特定通信组呼叫。 当发起呼叫的通信单元停止发送，另一个通信单元开始发送时，通信处理信息被更新以反映发送通信单元的变化。 直到特定的通信组呼叫结束为止，这种情况继续发生; 一旦结束，就从目的地数据库中删除通信处理信息。