High performance computer system having a firmware error queue and automatic error handling
    3.
    发明授权
    High performance computer system having a firmware error queue and automatic error handling 失效
    具有固件错误队列和自动错误处理的高性能计算机系统

    公开(公告)号:US07039836B2

    公开(公告)日:2006-05-02

    申请号:US10404490

    申请日:2003-04-01

    IPC分类号: G06F11/00

    CPC分类号: G06F11/0781 G06F11/0724

    摘要: A cellular computer system is constructed of a plurality of cells. Each cell has a memory system, a plurality of processors capable of accessing the memory system, a system communication interface coupled to processors, and a cell error queue maintained by a processor within the memory system. The system communication interface of each cell is coupled to other cells of the system. A first cell of the plurality of cells is a master cell that maintains a partition error queue and is capable of receiving into the partition error queue error descriptors from the cell error queue of a second cell of the plurality of cells.

    摘要翻译: 蜂窝计算机系统由多个小区构成。 每个单元具有存储器系统,能够访问存储器系统的多个处理器,耦合到处理器的系统通信接口以及由存储器系统内的处理器维护的单元错误队列。 每个小区的系统通信接口耦合到系统的其他小区。 多个单元的第一单元是维护分区错误队列并且能够从多个单元的第二单元的单元错误队列接收到分区错误队列错误描述符的主单元。

    Communication among partitioned devices
    5.
    发明授权
    Communication among partitioned devices 有权
    分区设备之间的通信

    公开(公告)号:US07386688B2

    公开(公告)日:2008-06-10

    申请号:US10902340

    申请日:2004-07-29

    IPC分类号: G06F12/00

    CPC分类号: G06F12/1458

    摘要: Information objects and system firmware for a processor in a partitionable computing system are disclosed. One object comprises information corresponding to components of the computer system. The information comprises entries defining an address and a size for registers normally accessible to other partitions. The registers are capable of defining an address area such that in use the processor is arranged to permit other partitions to access at least one address area defined by the at least one register and to deny other partitions access to address areas other than the at least one accessible address area.

    摘要翻译: 公开了可分割计算系统中处理器的信息对象和系统固件。 一个对象包括对应于计算机系统的组件的信息。 信息包括定义其他分区通常可访问的寄存器的地址和大小的条目。 这些寄存器能够定义地址区域,使得在使用中处理器被布置为允许其他分区访问由至少一个寄存器定义的至少一个地址区域,并且拒绝其他分区访问除了至少一个以外的地址区域 可访问的地址区域。

    Method and system for supporting virtual mappings for shared firmware
    6.
    发明授权
    Method and system for supporting virtual mappings for shared firmware 有权
    用于支持共享固件的虚拟映射的方法和系统

    公开(公告)号:US07302547B2

    公开(公告)日:2007-11-27

    申请号:US10955802

    申请日:2004-09-30

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0284

    摘要: System and method of supporting virtual mappings for shared firmware contents in a computer system are described. In one embodiment, the method comprises, responsive to a function call issued by a processor, determining whether address translation has been enabled for the issuing processor; and responsive to a determination that address translation has been enabled, determining an ID of the issuing processor; identifying a Physical-to-Virtual (“PTV”) Map corresponding to the issuing processor; extracting from the identified PTV map a virtual address corresponding to a physical address passed in the function call; and returning the virtual address to the issuing processor.

    摘要翻译: 描述了在计算机系统中支持用于共享固件内容的虚拟映射的系统和方法。 在一个实施例中,该方法包括:响应于由处理器发出的功能调用,确定是否为发布处理器启用了地址转换; 并且响应于已经启用了地址转换的确定,确定所述发布处理器的ID; 识别与发行处理器对应的物理到虚拟(“PTV”)映射; 从所识别的PTV映射中提取与在功能调用中传递的物理地址相对应的虚拟地址; 并将虚拟地址返回给发布处理器。