公开(公告)号：US4037210A

公开(公告)日：1977-07-19

申请号：US653497

申请日：1976-01-29

申请人： Richard Stanton Sharp

发明人： Richard Stanton Sharp

IPC分类号： G06F13/18 ,  G06F3/00 ,  G06F15/16

CPC分类号： G06F13/18

摘要： Disclosed is a computer system utilizing an interface unit for routing the information exchanged between processor units and memory units, in a temporal multiplex manner whereby the exclusive access of any one processor to any memory proceeds concurrently with the exclusive access of another processor to another memory. The system includes at least two independently operable processors and at least two independently addressable and separately operable memories, the latter being connected to the former through the interface unit.

摘要翻译： 公开了一种利用接口单元的计算机系统，用于以时间多路复用方式路由在处理器单元和存储器单元之间交换的信息，由此任何一个处理器对任何存储器的独占访问与另一个处理器对另一个存储器的独占访问同时进行。 该系统包括至少两个可独立操作的处理器和至少两个独立可寻址和可单独操作的存储器，后者通过接口单元连接到前者。