Carrier and test socket for leadless integrated circuit
    1.
    发明授权
    Carrier and test socket for leadless integrated circuit 失效
    无引线集成电路的载波和测试插座

    公开(公告)号:US4329642A

    公开(公告)日:1982-05-11

    申请号:US18869

    申请日:1979-03-09

    CPC分类号: H05K7/1023 G01R1/0483

    摘要: A carrier and test socket for a leadless integrated circuit package includes a base portion having a cavity for receiving the integrated circuit and a plurality of leads on a surface and extending from the cavity. The leads are arranged to mate with contacts of test equipment, and a portion of each lead is cantilevered into the cavity and arranged to mate with contacts of the integrated circuit. The carriers are configured to facilitate stacking, and a retainer member is provided for retaining the integrated circuit in the carrier while being individually handled.

    摘要翻译: 用于无引线集成电路封装的载体和测试插座包括具有用于接收集成电路的空腔的基座部分和在表面上从腔体延伸的多个引线。 引线布置成与测试设备的触点配合,并且每个引线的一部分悬臂连接到空腔中并布置成与集成电路的触点配合。 载体构造成便于堆叠,并且提供保持构件用于在集成电路单独处理的同时将集成电路保持在载体中。