公开(公告)号：US07146445B2

公开(公告)日：2006-12-05

申请号：US10763784

申请日：2004-01-23

申请人： Robert Scott Appleton ,  Patrick Steven Grant ,  David Etzkorn

发明人： Robert Scott Appleton ,  Patrick Steven Grant ,  David Etzkorn

IPC分类号： G06F13/00 ,  G06F13/20

CPC分类号： G06F13/4081

摘要： A test apparatus for telecommunication equipment includes motherboard that executes a resident operation control mechanism, so that the test apparatus exhibits default hardware functionality. However, if a daughtercard has been plugged into the motherboard, the motherboard ignores the default firmware and executes whatever replacement operation control software is provided on the daughtercard—causing the test apparatus to acquire a hardware functionality exclusive of the motherboard default.

摘要翻译： 用于电信设备的测试设备包括执行驻留操作控制机构的主板，使得测试设备呈现出默认的硬件功能。 然而，如果子卡已插入主板，则主板将忽略默认固件，并执行子卡上提供的任何替换操作控制软件，导致测试设备获取独占于主板默认值的硬件功能。

公开(公告)号：US06628621B1

公开(公告)日：2003-09-30

申请号：US09432707

申请日：1999-11-02

申请人： Robert Scott Appleton ,  Andrew L. Plankenhorn ,  Paul E. Calvert ,  Steven Creg Killen

发明人： Robert Scott Appleton ,  Andrew L. Plankenhorn ,  Paul E. Calvert ,  Steven Creg Killen

IPC分类号： H04J116

CPC分类号： H04L43/50 ,  H04J3/14 ,  H04L1/244

摘要： A bit error rate test (BERT) system is configured as a field programmable gate array that emulates multiple independent BERT generators. The BERT generators produce test frames containing test pattern codes associated with respectively different time division multiplexed (TDM) digital communication channels, that are not necessarily mutually contiguous within a plurality of TDM timeslots of a network communication frame serving digital communication circuits. A framing unit assembles the test code patterns into a test frame and transmits the test frame over a serial network interface to a plurality of digital channel units of a channel bank. The framing unit also interfaces contents of test code patterns within test frames returned from the channel units over the serial network interface with a plurality of data channel-specific virtual BERT receivers, associated with respective digital communication channels. A bit error processor determines errors in the contents of the test code patterns within returned test frames.

摘要翻译： 一个误码率测试（BERT）系统被配置为模拟多个独立BERT发生器的现场可编程门阵列。 BERT发生器产生包含与分别不同的时分多路复用（TDM）数字通信信道相关联的测试模式码的测试帧，其不一定在服务数字通信电路的网络通信帧的多个TDM时隙内彼此相邻。 成帧单元将测试码模式组装成测试帧，并将测试帧通过串行网络接口发送到信道组的多个数字信道单元。 成帧单元还将通过串行网络接口从信道单元返回的测试帧内的测试码模式的内容与与相应数字通信信道相关联的多个数据信道专用虚拟BERT接收机进行接口。 位错误处理器确定返回的测试帧内的测试代码模式的内容中的错误。