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1.发明申请公开(公告)号：US20080259484A1
公开(公告)日：2008-10-23
申请号：US12166136
申请日：2008-07-01
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B20/10027 , G11B20/10046 , G11B20/10055
摘要： A read channel and method using that read channel are disclosed. The read channel comprises an analog to digital converter which asynchronously samples at a fixed rate an analog signal formed by reading a data track, where that data track was written to a data storage medium at a symbol rate and an interpolator interconnected with the analog to digital converter. The read channel further comprises a fractionally-spaced equalizer, where the interpolator provides an interpolated signal to the fractionally-spaced equalizer at an interpolation rate, where that interpolation rate is greater than the symbol rate. The fractionally-spaced equalizer forms a synchronous equalized signal. The read channel further comprises a gain control module interconnected with the fractionally-spaced equalizer, and a sequence detector interconnected with the gain control module.
摘要翻译： 公开了使用该读通道的读通道和方法。 读通道包括模数转换器，其以固定速率异步采样通过读取数据轨道形成的模拟信号，其中数据轨道以符号速率写入数据存储介质，并且与模数转换器互连的内插器 转换器。 读通道还包括分数间隔的均衡器，其中内插器以内插速率向分数间隔的均衡器提供内插信号，其中该内插速率大于符号率。 分数间隔均衡器形成同步均衡信号。 读通道还包括与分数间隔均衡器互连的增益控制模块，以及与增益控制模块互连的序列检测器。
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2.发明授权公开(公告)号：US07684139B2
公开(公告)日：2010-03-23
申请号：US12166136
申请日：2008-07-01
IPC分类号： G11B5/035
CPC分类号： G11B20/10009 , G11B20/10027 , G11B20/10046 , G11B20/10055
摘要： A read channel and method using that read channel are disclosed. The read channel comprises an analog to digital converter which asynchronously samples at a fixed rate an analog signal formed by reading a data track, where that data track was written to a data storage medium at a symbol rate and an interpolator interconnected with the analog to digital converter. The read channel further comprises a fractionally-spaced equalizer, where the interpolator provides an interpolated signal to the fractionally-spaced equalizer at an interpolation rate, where that interpolation rate is greater than the symbol rate. The fractionally-spaced equalizer forms a synchronous equalized signal. The read channel further comprises a gain control module interconnected with the fractionally-spaced equalizer, and a sequence detector interconnected with the gain control module.
摘要翻译： 公开了使用该读通道的读通道和方法。 读通道包括模数转换器，其以固定速率异步采样通过读取数据轨道形成的模拟信号，其中数据轨道以符号速率写入数据存储介质，并且与模数转换器互连的内插器 转换器。 读通道还包括分数间隔的均衡器，其中内插器以内插速率向分数间隔的均衡器提供内插信号，其中该内插速率大于符号率。 分数间隔均衡器形成同步均衡信号。 读通道还包括与分数间隔均衡器互连的增益控制模块，以及与增益控制模块互连的序列检测器。
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