Function generator
    1.
    发明授权
    Function generator 失效
    函数发生器

    公开(公告)号:US4482975A

    公开(公告)日:1984-11-13

    申请号:US362740

    申请日:1982-03-29

    摘要: Apparatus for generating an output digital signal that approximates the value of a predetermined mathematical function lying in the X-Y plane at a point defined by an input digital signal. The mathematical function is approximated by a plurality of linear least-mean-square line segments each of which includes a central point, R, and a slope, S, with the desired point being defined by the equation F(X) approximates R+S.DELTA.X, where .DELTA.X is the X distance between the central point R and the desired point. R, S and .DELTA.X are precalculated and stored in PROM lookup tables and combined as stated in the above equation.

    摘要翻译: 一种用于产生输出数字信号的装置,其近似于由输入数字信号限定的点处于X-Y平面中的预定数学函数的值。 数学函数由多个线性最小均方线段近似,每个线段包括中心点R和斜率S,其中期望点由等式F(X)定义为近似R + S DELTA X,其中DELTA X是中心点R和期望点之间的X距离。 R,S和DELTA X被预先计算并存储在PROM查找表中并按上述等式组合。

    Regulated suppressed carrier modulation system
    2.
    发明授权
    Regulated suppressed carrier modulation system 失效
    调节抑制载波调制系统

    公开(公告)号:US4243955A

    公开(公告)日:1981-01-06

    申请号:US920048

    申请日:1978-06-28

    IPC分类号: H03C1/52 H04B1/12

    CPC分类号: H03C1/52

    摘要: A method and apparatus for suppressing carrier leakage components in a system for modulating a carrier with a selected signal wherein the carrier and a quadrature component of the carrier are weighted and summed with the modulated carrier to produce a component substantially equal and opposite in phase to the leakage component so that the summing substantially cancels or suppresses the leakage component.

    摘要翻译: 一种用于抑制用于用所选信号调制载波的系统中的载波泄漏分量的方法和装置,其中载波和载波的正交分量被加权并与调制的载波相加以产生基本相等且与相位相反的分量 泄漏分量,使得求和基本上抵消或抑制泄漏分量。

    Gray scale matcher
    3.
    发明授权
    Gray scale matcher 失效
    灰度匹配器

    公开(公告)号:US07450741B2

    公开(公告)日:2008-11-11

    申请号:US10873790

    申请日:2004-06-22

    IPC分类号: G06K9/00

    CPC分类号: G06K9/00087

    摘要: A method for comparing a first print image having a first set of minutiae to a second print image having a second set of minutiae, wherein at least a second subset of minutiae from the second set is mated to a first subset of minutiae from the first set, the method that includes the steps of: selecting (350) a first pair of minutiae from the first subset and a second pair of corresponding mated minutiae from the second subset; generating (350) a first segment based on the first pair of minutiae and a second segment based on the second pair of minutiae; generating (360) a first cross-section profile based on the first segment and a second cross-section profile based on the second segment; and computing (365) at least one similarity measure that is indicative of the similarity between the first cross-section profile and the second cross-section profile.

    摘要翻译: 一种用于将具有第一组细节的第一打印图像与具有第二组细节的第二打印图像进行比较的方法,其中来自第二组的至少第二细节细节与第一组的细节的第一子集相配合 该方法包括以下步骤:从第一子集中选择(350)第一对细节,并从第二子集中选择第二对相应的配对细节; 基于所述第一对细节生成(350)第一片段和基于所述第二对细节的第二片段; 基于所述第一段产生(360)第一横截面轮廓和基于所述第二段的第二横截面轮廓; 以及计算(365)指示所述第一截面轮廓和所述第二横截面轮廓之间的相似度的至少一个相似性度量。

    Processing unit for multiplying two mathematical quantities including at
least one complex multiplier
    4.
    发明授权
    Processing unit for multiplying two mathematical quantities including at least one complex multiplier 失效
    用于将包括至少一个复数乘法器的两个数学量相乘的处理单元

    公开(公告)号:US4354249A

    公开(公告)日:1982-10-12

    申请号:US132963

    申请日:1980-03-24

    IPC分类号: G06F7/48 G06F7/52

    CPC分类号: G06F7/4812

    摘要: The processing unit includes at least one complex multiplier having hour multiplying circuits for multiplying the real and imaginary components of two complex vectors and combining the products to produce a complex output vector. Representing the input complex vectors by (A+jB) and (C+jD) the output complex vector becomes (AC-BD)+j(BC+AD). The combining circuits can be switched so that one of the input complex vectors is conjugated and the output complex vector becomes (AC+BD)+j(BC-AD). Thus, the present processing unit can provide the dot product of two complex vectors or the like.

    摘要翻译: 所述处理单元包括至少一个复数乘法器,其具有用于乘以两个复矢量的实分量和虚分量的小时乘法电路,并组合乘积以产生复输出矢量。 通过(A + jB)和(C + jD)表示输入复矢量,输出复矢量变为(AC-BD)+ j(BC + AD)。 可以将组合电路切换成使得输入复矢量中的一个被共轭,并且输出复矢量变为(AC + BD)+ j(BC-AD)。 因此,本处理单元可以提供两个复矢量等的点积。

    Digital scaling apparatus
    5.
    发明授权
    Digital scaling apparatus 失效
    数字缩放装置

    公开(公告)号:US4335372A

    公开(公告)日:1982-06-15

    申请号:US134859

    申请日:1980-03-28

    IPC分类号: G06F5/01 G06F3/00

    CPC分类号: G06F5/015

    摘要: Digital scaling apparatus adapted to receive a plurality of digital signals each composed of a plurality of bits which first encodes each of the digital signals in accordance with the number of left shifts possible in each signal without losing any data, and then compares the encoded signals to select the largest digital signal, which selected encoded signal is used as a command to shift all of the digital signals an amount necessary to left justify the largest digital signal.

    摘要翻译: 数字缩放装置,适于接收多个数字信号,每个数字信号由多个位组成,每个位首先根据每个信号中可能的左移位的数量对每个数字信号进行编码,而不会丢失任何数据,然后将编码的信号与 选择最大的数字信号,所选择的编码信号用作将所有数字信号的所有数字移位到最大数字信号左边所需的量。

    Adaptive array with optimal sequential gradient control
    6.
    发明授权
    Adaptive array with optimal sequential gradient control 失效
    具有最佳顺序梯度控制的自适应阵列

    公开(公告)号:US4286268A

    公开(公告)日:1981-08-25

    申请号:US29805

    申请日:1979-04-13

    IPC分类号: H01Q3/26 H01Q21/29 H04B1/10

    摘要: An adaptive antenna array including a main antenna and at least one auxiliary antenna with a plurality of weight adjusting channels and circuitry for adjusting the gain of each channel periodically switched into each channel, and each channel further including memory means for continued gradient control during period that the circuit is connected to other channels.

    摘要翻译: 一种自适应天线阵列,包括主天线和至少一个具有多个权重调整信道的辅助天线和用于调整周期性切换到每个信道的每个信道的增益的电路,并且每个信道还包括用于在周期期间进行连续梯度控制的存储装置 电路连接到其他通道。

    Minimum miss distance vector measuring system
    7.
    发明授权
    Minimum miss distance vector measuring system 失效
    最小遗漏距离矢量测量系统

    公开(公告)号:US4057708A

    公开(公告)日:1977-11-08

    申请号:US684594

    申请日:1976-05-10

    IPC分类号: F41J5/12 G01S9/04 G06F15/58

    CPC分类号: F41J5/12

    摘要: A system for measuring the minimum miss distance and direction in three planes of a missile trajectory with respect to a target. Space diverse sequential range measurements are made from a plurality of pulse radar sensors mounted on the target. The range measurements are position identified in pairs of data transmitted to a data processor. The data processor adds time data and utilizes a nonlinear conjugate directions algorithm to solve for the minimum miss distance vector with a high degree of accuracy in a relatively short time period.

    摘要翻译: 一种用于测量相对于目标的导弹轨迹的三个平面中的最小误差距离和方向的系统。 从安装在目标上的多个脉冲雷达传感器进行空间多样化的连续范围测量。 距离测量是以传输到数据处理器的数据对形式识别的位置。 数据处理器添加时间数据并利用非线性共轭方向算法在相对较短的时间周期内以高精确度求解最小奇偶距离矢量。

    Programmable realtime interface between a Block Floating Point processor
and memory
    8.
    发明授权
    Programmable realtime interface between a Block Floating Point processor and memory 失效
    块浮点处理器和存储器之间的可编程实时接口

    公开(公告)号:US4660143A

    公开(公告)日:1987-04-21

    申请号:US653641

    申请日:1984-09-24

    IPC分类号: G01S7/295 G06F5/01 G06F13/12

    摘要: The programmable interface gives a Block Floating Point processor the capability of performing various real-time signal algorithms on collected radar data in an external batch memory. Normally, Block Floating Point processors are not capable of accommodating data having varying exponent scales such as the data received from a batch memory in a radar system. The programmable interface solves the exponential normalization process using two data paths, an instruction processor, a microcode processor, a pre-shift control and an address generator. Data flow instructions are passed from the instruction processor to the microcode processor which executes the particular instruction's timing sequence. The first data path passes data from the batch memory to the array processor and contains a pre-shifter to normalize the batch memory-stored data. The second data path passes the processed data from the processor to the batch memory. The pre-shifter portion of the first data path is controlled by a pre-shifter control section in the invention, which generates a 4-bit code used to command the pre-shifter. Finally, an address generator creates a sequence of fetch and store addresses for data travelling between the batch memory and the array processor.

    摘要翻译: 可编程接口使块浮点处理器能够在外部批量存储器中对收集的雷达数据执行各种实时信号算法。 通常,块浮点处理器不能容纳具有不同指数级别的数据,例如在雷达系统中从批量存储器接收的数据。 可编程接口使用两个数据路径,指令处理器,微代码处理器,预移位控制和地址发生器来解决指数归一化过程。 数据流指令从指令处理器传送到执行特定指令定时序列的微代码处理器。 第一个数据路径将数据从批量存储器传递到阵列处理器,并包含一个预移位器来对批量存储器存储的数据进行归一化。 第二数据路径将处理后的数据从处理器传递到批量存储器。 第一数据路径的移位前部分由本发明中的预移位器控制部分控制,其产生用于命令前置换头的4位代码。 最后,地址生成器为在批量存储器和阵列处理器之间传输的数据创建一系列获取和存储地址。

    Adaptive antenna array including batch covariance relaxation apparatus
and method
    9.
    发明授权
    Adaptive antenna array including batch covariance relaxation apparatus and method 失效
    包括批量协方差松弛装置和方法的自适应天线阵列

    公开(公告)号:US4353119A

    公开(公告)日:1982-10-05

    申请号:US159027

    申请日:1980-06-13

    IPC分类号: H01Q3/26 H04B7/00 G06F15/20

    CPC分类号: H01Q3/2635

    摘要: A directional main antenna and N omnidirectional auxiliary antennas connected to each supply an m-sample batch of signals to apparatus for developing a weighting vector 2 through Batch Covariance Relaxation apparatus, which weighting vector is then used to weight the signals from the auxiliary antennas and the weighted outputs are summed with the signal from the main antenna to suppress undesired sidelobe interferences. The processor includes apparatus performing complex vector dot product multiplication, dividing apparatus, apparatus for adding or subtracting to provide the recursive updating of vectors and memories for storing the various signals between operations.

    摘要翻译: 连接到每个主定向天线和N个全向辅助天线,通过批量协方差松弛装置向装置发送加权矢量2的信号的m个采样批次,然后使用加权矢量对来自辅助天线的信号进行加权, 加权输出与来自主天线的信号相加以抑制不期望的旁瓣干扰。 处理器包括执行复矢量积积乘法的装置,分割装置,用于加法或减法的装置,以提供向量的递归更新和用于在操作之间存储各种信号的存储器。

    Steepest descent controller for an adaptive antenna array
    10.
    发明授权
    Steepest descent controller for an adaptive antenna array 失效
    用于自适应天线阵列的最陡下降控制器

    公开(公告)号:US4236158A

    公开(公告)日:1980-11-25

    申请号:US22663

    申请日:1979-03-22

    申请人: Sam M. Daniel

    发明人: Sam M. Daniel

    IPC分类号: H01Q3/26 H04B7/00

    CPC分类号: H01Q3/2629

    摘要: An adaptive antenna array including a main antenna and an auxiliary antenna with a steepest descent controller for deriving the optimal feedback gain to guarantee stable and rapid convergence of the weights comprising the weight vector w(t) to form a null in the direction of interference while having minimal effect on the main beam.

    摘要翻译: 一种自适应天线阵列,包括主天线和具有最陡下降控制器的辅助天线,用于导出最佳反馈增益,以保证包含权重向量w(t)的权重的稳定和快速收敛,以在干扰方向上形成零,同时 对主梁的影响最小。