Symbol flipping LDPC decoding system
    2.
    发明授权
    Symbol flipping LDPC decoding system 有权
    符号翻转LDPC解码系统

    公开(公告)号:US08739004B2

    公开(公告)日:2014-05-27

    申请号:US13468968

    申请日:2012-05-10

    IPC分类号: H03M13/00

    摘要: Various embodiments of the present inventions provide a symbol flipping LDPC decoding system. For example, a symbol flipping data processing system is disclosed that includes a low density parity check decoder operable to decode codewords and to identify unsatisfied parity checks, a symbol flipping controller operable to change values of at least one symbol in the codewords based on the unsatisfied parity checks to assist the low density parity check decoder to decode the codewords, a scheduler operable to control a decoding and symbol flipping mode in the low density parity check decoder and the symbol flipping controller, and a hard decision queue operable to store hard decisions for converged codewords from the low density parity check decoder.

    摘要翻译: 本发明的各种实施例提供符号翻转LDPC解码系统。 例如,公开了一种符号翻转数据处理系统,其包括:低密度奇偶校验解码器,其可操作以解码码字并识别不满足的奇偶校验;符号翻转控制器,可操作以基于不满足于改变码字中的至少一个符号的值 奇偶校验检查以帮助低密度奇偶校验解码器对码字进行解码,可操作以控制低密度奇偶校验解码器和符号翻转控制器中的解码和符号翻转模式的调度器,以及用于存储硬判决的硬判决队列 来自低密度奇偶校验解码器的收敛码字。

    Symbol Flipping LDPC Decoding System
    3.
    发明申请
    Symbol Flipping LDPC Decoding System 有权
    符号翻转LDPC解码系统

    公开(公告)号:US20130305114A1

    公开(公告)日:2013-11-14

    申请号:US13468968

    申请日:2012-05-10

    IPC分类号: H03M13/05 G06F11/10 H03M13/29

    摘要: Various embodiments of the present inventions provide a symbol flipping LDPC decoding system. For example, a symbol flipping data processing system is disclosed that includes a low density parity check decoder operable to decode codewords and to identify unsatisfied parity checks, a symbol flipping controller operable to change values of at least one symbol in the codewords based on the unsatisfied parity checks to assist the low density parity check decoder to decode the codewords, a scheduler operable to control a decoding and symbol flipping mode in the low density parity check decoder and the symbol flipping controller, and a hard decision queue operable to store hard decisions for converged codewords from the low density parity check decoder.

    摘要翻译: 本发明的各种实施例提供符号翻转LDPC解码系统。 例如,公开了一种符号翻转数据处理系统,其包括:低密度奇偶校验解码器,其可操作以解码码字并识别不满足的奇偶校验;符号翻转控制器,可操作以基于不满足于改变码字中的至少一个符号的值 奇偶校验检查以帮助低密度奇偶校验解码器对码字进行解码,可操作以控制低密度奇偶校验解码器和符号翻转控制器中的解码和符号翻转模式的调度器,以及用于存储硬判决的硬判决队列 来自低密度奇偶校验解码器的收敛码字。

    Systems and Methods for Efficient Data Shuffling in a Data Processing System
    4.
    发明申请
    Systems and Methods for Efficient Data Shuffling in a Data Processing System 有权
    数据处理系统中有效数据刷新的系统和方法

    公开(公告)号:US20130080844A1

    公开(公告)日:2013-03-28

    申请号:US13239683

    申请日:2011-09-22

    IPC分类号: G06F11/10 G06F12/00

    摘要: Various embodiments of the present invention provide systems and methods for data processing. For example, a method for data processing is disclosed that includes: receiving a data input having at least a first local chunk and a second local chunk, the data input also being defined as having at least a first global chunk and a second global chunk; rearranging an order of the first local chunk and the second local chunk to yield a locally interleaved data set; storing the locally interleaved data set to a first memory, such that the first global chunk is stored to a first memory space, and the second global chunk is stored to a second memory space; accessing the locally interleaved data set from the first memory; and storing the locally interleaved data set to a second memory. The first global chunk is stored to a third memory space defined at least in part based on the first memory space, and the second global chunk is stored to a fourth memory space defined at least in part based on the second memory space.

    摘要翻译: 本发明的各种实施例提供了用于数据处理的系统和方法。 例如,公开了一种用于数据处理的方法,包括:接收具有至少第一本地块和第二本地块的数据输入,所述数据输入还被定义为具有至少第一全局块和第二全局块; 重新排列第一本地块和第二本地块的顺序以产生本地交织的数据集; 将本地交织的数据集存储到第一存储器,使得第一全局块被存储到第一存储器空间,并且第二全局块被存储到第二存储器空间; 从所述第一存储器访问本地交错数据集; 以及将本地交织的数据集存储到第二存储器。 第一全局块被存储到基于第一存储器空间至少部分地定义的第三存储器空间,并且第二全局块被存储到基于第二存储器空间至少部分地定义的第四存储器空间。