MEMORY POOLING IN SEGMENTED MEMORY ARCHITECTURE
    1.
    发明申请
    MEMORY POOLING IN SEGMENTED MEMORY ARCHITECTURE 审中-公开
    记忆体存储在内存存储器架构中

    公开(公告)号:US20110246742A1

    公开(公告)日:2011-10-06

    申请号:US12752563

    申请日:2010-04-01

    IPC分类号: G06F12/02 G06F12/00

    CPC分类号: G06F9/5016 G06F12/023

    摘要: Methods and computing systems for managing memory are disclosed. One computing system implementing a memory management scheme includes a plurality of memory pools formed in a segment-addressable memory, each of the memory pools including one or more pool areas having a common size and a size class, wherein the size class defines a maximum amount of memory able to be allocated from the memory pool. The computing system includes a memory management system interfaced to the segment-addressable memory, the memory management system including one or more memory pool tracking lists configured to track usage of the plurality of memory pools.

    摘要翻译: 公开了用于管理存储器的方法和计算系统。 实现存储器管理方案的一个计算系统包括形成在段可寻址存储器中的多个存储器池,每个存储器池包括具有公共大小和大小类别的一个或多个池区,其中大小类定义最大量 的内存能够从内存池分配。 计算系统包括与段可寻址存储器连接的存储器管理系统,该存储器管理系统包括被配置为跟踪多个存储器池的使用的一个或多个存储器池跟踪列表。

    System and method for maintaining a constant processor service level in a computer
    2.
    发明授权
    System and method for maintaining a constant processor service level in a computer 有权
    用于在计算机中维持恒定的处理器服务水平的系统和方法

    公开(公告)号:US07734952B1

    公开(公告)日:2010-06-08

    申请号:US10974194

    申请日:2004-10-27

    IPC分类号: G06F11/00

    摘要: A method and system for maintaining the execution speed of a multiprocessor computer system includes automatically detecting a change in instruction execution rate in a disabled processor by a threshold amount and determining an amount of change in instruction execution rate to adjust an actual system-level instruction execution rate to approximate a target system-level instruction execution rate. The target system-level execution rate being pre-determined. Thereafter, the method adjusts one or more instruction processor execution rates such that the actual system-level instruction execution rate approximates the target system-level instruction execution rate to overcome the loss of the disabled processor. One embodiment of the invention involves the use of a processor key for licensing of processor resources within the computer system and offers the option of enabling a dynamic processor recovery method as well as an automatic execution rate regulation method.

    摘要翻译: 用于维护多处理器计算机系统的执行速度的方法和系统包括:自动检测禁用处理器中的指令执行率的变化阈值量,并且确定指令执行速率的变化量以调整实际的系统级指令执行 速率近似目标系统级指令执行率。 目标系统级执行率是预先确定的。 此后,该方法调整一个或多个指令处理器执行率,使得实际的系统级指令执行速率接近目标系统级指令执行速率以克服禁用的处理器的丢失。 本发明的一个实施例涉及使用处理器密钥来对计算机系统内的处理器资源进行许可,并且提供启动动态处理器恢复方法以及自动执行速率调节方法的选项。