摘要:
The present invention provides a mutual capacitance one glass solution touch panel and a manufacture method thereof. A first through hole and a second through hole are formed at an isolation layer of the touch panel. A first sub electrode pattern of the touch panel is electrically connected to a fourth sub electrode pattern of the touch panel via the first through hole, and a third sub electrode pattern of the touch panel is electrically connected to a second sub electrode pattern of the touch panel via the second through hole as touch control test is performed. According to the aforesaid arrangement, the present invention is capable of reducing the wire resistance of the transmission signals in the electrode patterns to raise the touch control sensitivity.
摘要:
A TFT substrate and a manufacturing method thereof are provided. In the manufacturing method, a metal oxide semiconductor layer is irradiated with UV light by using a gate as a shielding layer, such that a portion of the metal oxide semiconductor layer irradiated by the UV light is conductorized to form a source, a drain, and a pixel electrode, and a portion of the metal oxide semiconductor layer shielded by the gate still retains semiconductor properties to form a semiconductor channel. The invention achieves the alignment of the source and the drain with the gate by processes of self-alignment of the gate and conductorization of the metal oxide semiconductor layer, and can effectively control an overlapping region of the source and drain and the gate. Thereby, the parasitic capacitance is reduced, and the display quality is improved. Also, the manufacturing method is simple, and the production efficiency is improved.
摘要:
A TFT substrate and a manufacturing method thereof are provided. In the manufacturing method, a metal oxide semiconductor layer is irradiated with UV light by using a gate as a shielding layer, such that a portion of the metal oxide semiconductor layer irradiated by the UV light is conductorized to form a source, a drain, and a pixel electrode, and a portion of the metal oxide semiconductor layer shielded by the gate still retains semiconductor properties to form a semiconductor channel. The invention achieves the alignment of the source and the drain with the gate by processes of self-alignment of the gate and conductorization of the metal oxide semiconductor layer, and can effectively control an overlapping region of the source and drain and the gate. Thereby, the parasitic capacitance is reduced, and the display quality is improved. Also, the manufacturing method is simple, and the production efficiency is improved.
摘要:
This invention provides a display panel and a fabricating method thereof. Wherein the display panel defines a display area and an edge area. The display panel includes a substrate, a gate layer, a gate insulating layer, a thin film encapsulation layer, and a polyimide layer. By disposing a buffer tank on the gate insulating layer, the flow rate of the polyimide solution printed through inkjet printing in the edge region is reduced when the polyimide layer is forming, thereby causing it to solidify to form the polyimide layer before flowing over a retaining wall, and preventing sealant contamination and peeling.
摘要:
An array substrate and a liquid crystal display panel are disclosed. In each pixel unit of the array substrate of the present invention, the gate electrode of the thin-film transistor and the via hole for connecting the thin-film transistor and the pixel electrode are respectively located at two sides of the two adjacent data lines closed to the pixel unit. Thereby, the present invention can significantly reduce the aperture ratio difference between the two sides of the pixel unit. Without affecting the aperture ratio, the difference in viewing angle due to the difference in aperture ratio is effectively solved, and the display quality is improved.
摘要:
The present invention relates to a pixel structure and a display panel containing the same. The pixel structure includes a main area and a sub-area respectively provided with four domains, wherein the main area is located above the sub-area, and the main area and the sub-area are respectively connected with driving thin-film transistors (TFTs) for current charging; wherein a quantity of the driving thin-film transistors (TFTs) connected to the main area is greater than a quantity of the driving TFTs connected to the sub-area, such that a voltage of the main area is greater than a voltage of the sub-area. The invention provides a pixel structure which adopts a novel design of an 8-domain structure, which improves an aperture ratio thereof, thereby reducing the risk of becoming a bright spot.
摘要:
An image edge processing method is disclosed. The method includes steps of: extracting a brightness component from an input image; calculating an edge probability value mp of each pixel in the image according to the extracted brightness component; calculating an enhancement coefficient A for each pixel based on the edge probability value mp; performing a noise detection according to the brightness component, and determining if each pixel in the image is a noise point; when the pixel is not a noise point, performing a logarithmic processing to the pixel in order to obtain a data w; enhancing an edge of the image according to the λ, the w and the brightness component in order to obtain an enhanced brightness component data; and after performing a brightness component synthesis according to the enhanced brightness component data, outputting an enhanced image. An electronic device and computer readable storage medium are also disclosed.
摘要:
A manufacturing method of a thin film transistor (TFT) array substrate and a TFT array substrate include forming a gate electrode, a gate insulating layer, and an active layer on a surface of a substrate in order. The active layer includes a channel, a source doped region, and a drain doped region. A protective layer is formed on a surface of the channel, and the source doped region and the drain doped region are made conductive. A source electrode and a drain electrode both are formed on the surface of the substrate, the protective layer is stripped, and a passivation layer is formed on the surface of the substrate.
摘要:
The present invention teaches a white balance method and device for a LCD panel. The method includes the following steps. Step S1 provides a LCD panel, including a mask-joint area and a non-mask-joint area outside the mask-joint area. The mask-joint area includes multiple first color resists arranged in an array, and the non-mask-joint area includes multiple second color resists arranged in an array. The first and second color resists are of different dimensions. Step S2 obtains a first white balance driving table for the mask-joint area and a second white balance driving table for the non-mask-joint area. Step S3 conducts white balance to the mask-joint area and non-mask-joint area using the first and second white balance driving tables, respectively. By applying different white balance driving tables to the mask-joint area and the non-mask-joint area, the white balance effect is improved, and the display quality of the LCD panel is enhanced.
摘要:
The invention provides a manufacturing method of the TFT array substrate. Compared to existing 4M process, the invention changes the structural design of the semi-transmissive mask for the photoresist layer for patterning the source/drain metal layer and the semiconductor layer. The edge forms a reduced thickness edge portion, so that the edge of the photoresist layer is thinned, and thereby the width of the photoresist layer is easily reduced in subsequent processes, and the semiconductor layer at the edge of the metal wire structure is easily etched during dry etching, reducing the tailing problem of the active layer at edges of source/drain to achieve finer metal wire structure, and improve optical stability, electrical performance, aperture ratio, reliability, power consumption, and the overall performance of the TFT array substrate. The residual problem of amorphous and heavily doped silicon on source/drain edge in original process is solved or reduced.