公开(公告)号：US09026573B2

公开(公告)日：2015-05-05

申请号：US13557462

申请日：2012-07-25

申请人： Sheau-Fang Lei ,  Shin-Chi Lai ,  Wen-Chieh Tseng

发明人： Sheau-Fang Lei ,  Shin-Chi Lai ,  Wen-Chieh Tseng

IPC分类号： G06F17/14

CPC分类号： G06F17/147 ,  G10L19/0212

摘要： A recursive type-IV discrete cosine transform system includes a first permutation device, a recursive type-III discrete cosine/sine transform device, a cosine/sine factor generation device, a recursive type-II discrete cosine/sine transform device, a second permutation device. The first permutation device performs two-dimensional order permutation operation on N digital signals for generating N two-dimensional first temporal signals. The recursive type-III discrete cosine/sine transform device repeats a type-III discrete cosine/sine transform for generating second temporal signals. The cosine/sine factor generation device sequentially performs cosine/sine factor multiplication and corresponding addition operations for generating third temporal signals. The recursive type-II discrete cosine/sine transform device repeats a type-II discrete cosine/sine transform for generating fourth temporal signals. The second permutation device performs a one-dimensional order permutation operation for generating N one-dimensional output signals. The N one-dimensional output signals are obtained by performing a type-IV discrete cosine transform on the N digital input signals.

摘要翻译： 递归型-IV离散余弦变换系统包括第一置换装置，递归型III离散余弦/正弦变换装置，余弦/正弦因子产生装置，递归型-II离散余弦/正弦变换装置，第二置换 设备。 第一置换装置对N个数字信号执行二维次序置换操作，以产生N个二维第一时间信号。 递归型III离散余弦/正弦变换装置重复用于产生第二时间信号的III型离散余弦/正弦变换。 余弦/正弦因子产生装置顺序执行余弦/正弦因子乘法和相应的相加操作，用于产生第三时间信号。 递归型II离散余弦/正弦变换装置重复用于产生第四时间信号的II型离散余弦/正弦变换。 第二置换装置执行用于产生N个一维输出信号的一维顺序置换操作。 通过对N个数字输入信号执行IV型离散余弦变换来获得N个一维输出信号。

公开(公告)号：US20130173679A1

公开(公告)日：2013-07-04

申请号：US13557462

申请日：2012-07-25

申请人： Sheau-Fang LEI ,  Shin-Chi LAI ,  Wen-Chieh TSENG

发明人： Sheau-Fang LEI ,  Shin-Chi LAI ,  Wen-Chieh TSENG

IPC分类号： G06F17/14

CPC分类号： G06F17/147 ,  G10L19/0212

摘要： A recursive type-IV discrete cosine transform system includes a first permutation device, a recursive type-III discrete cosine/sine transform device, a cosine/sine factor generation device, a recursive type-II discrete cosine/sine transform device, a second permutation device. The first permutation device performs two-dimensional order permutation operation on N digital signals for generating N two-dimensional first temporal signals. The recursive type-III discrete cosine/sine transform device repeats a type-III discrete cosine/sine transform for generating second temporal signals. The cosine/sine factor generation device sequentially performs cosine/sine factor multiplication and corresponding addition operations for generating third temporal signals. The recursive type-II discrete cosine/sine transform device repeats a type-II discrete cosine/sine transform for generating fourth temporal signals. The second permutation device performs a one-dimensional order permutation operation for generating N one-dimensional output signals. The N one-dimensional output signals are obtained by performing a type-IV discrete cosine transform on the N digital input signals.

摘要翻译： 递归型-IV离散余弦变换系统包括第一置换装置，递归型III离散余弦/正弦变换装置，余弦/正弦因子产生装置，递归型-II离散余弦/正弦变换装置，第二置换 设备。 第一置换装置对N个数字信号执行二维次序置换操作，以产生N个二维第一时间信号。 递归型III离散余弦/正弦变换装置重复用于产生第二时间信号的III型离散余弦/正弦变换。 余弦/正弦因子产生装置顺序执行余弦/正弦因子乘法和相应的相加操作，用于产生第三时间信号。 递归型II离散余弦/正弦变换装置重复用于产生第四时间信号的II型离散余弦/正弦变换。 第二置换装置执行用于产生N个一维输出信号的一维顺序置换操作。 通过对N个数字输入信号执行IV型离散余弦变换来获得N个一维输出信号。

公开(公告)号：US08924452B2

公开(公告)日：2014-12-30

申请号：US13557451

申请日：2012-07-25

申请人： Sheau-Fang Lei ,  Shin-Chi Lai ,  Chuan-An Chang

发明人： Sheau-Fang Lei ,  Shin-Chi Lai ,  Chuan-An Chang

IPC分类号： G06F15/00

CPC分类号： G06F17/141

摘要： A fixed-coefficient variable prime length recursive discrete Fourier transform system includes a pre-processing device, a real-part computation device, an imaginary-part computation device and a post-processing device. The pre-processing device receives N digital input signals and performs order permutation operation to generate first and second temporal signals, wherein N is a prime number. The real-part computation device receives the real part of the first and second temporal signals and performs discrete cosine/sine transform to generate third and fourth temporal signals. The imaginary-part computation device receives the imaginary part of the first and second temporal signals and performs discrete cosine/sine transform to generate fifth and sixth temporal signals. The post-processing device receives the third, fourth, fifth and sixth temporal signals to perform order permutation and addition operations for generating N digital output signals, wherein the N digital output signals are the discrete Fourier transform of the N digital signals.

摘要翻译： 固定系数可变素数长度递归离散傅里叶变换系统包括预处理装置，实部计算装置，虚部计算装置和后处理装置。 预处理装置接收N个数字输入信号并执行顺序置换操作以产生第一和第二时间信号，其中N是素数。 实部计算装置接收第一和第二时间信号的实部，并执行离散余弦/正弦变换以产生第三和第四时间信号。 虚部计算装置接收第一和第二时间信号的虚部，并执行离散余弦/正弦变换以产生第五和第六时间信号。 后处理装置接收第三，第四，第五和第六时间信号以执行用于产生N个数字输出信号的顺序置换和相加操作，其中N个数字输出信号是N个数字信号的离散付里叶变换。

公开(公告)号：US20130173680A1

公开(公告)日：2013-07-04

申请号：US13557451

申请日：2012-07-25

申请人： Sheau Fang LEI ,  Shin Chi LAI ,  Chuan An CHANG

发明人： Sheau Fang LEI ,  Shin Chi LAI ,  Chuan An CHANG

IPC分类号： G06F17/14

CPC分类号： G06F17/141

摘要： A fixed-coefficient variable prime length recursive discrete Fourier transform system includes a pre-processing device, a real-part computation device, an imaginary-part computation device and a post-processing device. The pre-processing device receives N digital input signals and performs order permutation operation to generate first and second temporal signals, wherein N is a prime number. The real-part computation device receives the real part of the first and second temporal signals and performs discrete cosine/sine transform to generate third and fourth temporal signals. The imaginary-part computation device receives the imaginary part of the first and second temporal signals and performs discrete cosine/sine transform to generate fifth and sixth temporal signals. The post-processing device receives the third, fourth, fifth and sixth temporal signals to perform order permutation and addition operations for generating N digital output signals, wherein the N digital output signals are the discrete Fourier transform of the N digital signals.

摘要翻译： 固定系数可变素数长度递归离散傅立叶变换系统包括预处理装置，实部计算装置，虚部计算装置和后处理装置。 预处理装置接收N个数字输入信号并执行顺序置换操作以产生第一和第二时间信号，其中N是素数。 实部计算装置接收第一和第二时间信号的实部，并执行离散余弦/正弦变换以产生第三和第四时间信号。 虚部计算装置接收第一和第二时间信号的虚部，并执行离散余弦/正弦变换以产生第五和第六时间信号。 后处理装置接收第三，第四，第五和第六时间信号以执行用于产生N个数字输出信号的顺序置换和相加操作，其中N个数字输出信号是N个数字信号的离散付里叶变换。