公开(公告)号：US08809942B2

公开(公告)日：2014-08-19

申请号：US13419400

申请日：2012-03-13

申请人： Shizue Matsuda ,  Shingo Sato ,  Wataru Saito

发明人： Shizue Matsuda ,  Shingo Sato ,  Wataru Saito

IPC分类号： H01L29/772

CPC分类号： H01L29/7811 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/66734 ,  H01L29/7813

摘要： According to an embodiment, a trench structure and a second semiconductor layer are provided in a semiconductor device. In the trench structure, a trench is provided in a surface of a device termination portion with a first semiconductor layer of a first conductive type including a device portion and the device termination portion, and an insulator is buried in the trench in such a manner to cover the trench. The second semiconductor layer, which is of a second conductive type, is provided on the surface of the first semiconductor layer, is in contact with at least a side on the device portion of the trench, and has a smaller depth than the trench. The insulator and a top passivation film for the semiconductor device are made of the same material.

摘要翻译： 根据实施例，在半导体器件中设置沟槽结构和第二半导体层。 在沟槽结构中，在器件端子部分的表面中设置沟槽，其中第一半导体层具有包括器件部分和器件端接部分的第一导电类型，并且绝缘体以这样的方式被掩埋在沟槽中： 覆盖沟槽。 具有第二导电类型的第二半导体层设置在第一半导体层的表面上，与沟槽的器件部分的至少一侧接触，并且具有比沟槽更小的深度。 用于半导体器件的绝缘体和顶部钝化膜由相同的材料制成。

公开(公告)号：US20130069109A1

公开(公告)日：2013-03-21

申请号：US13419400

申请日：2012-03-13

申请人： Shizue MATSUDA ,  Shingo SATO ,  Wataru SAITO

发明人： Shizue MATSUDA ,  Shingo SATO ,  Wataru SAITO

IPC分类号： H01L29/739 ,  H01L21/302 ,  H01L29/78

CPC分类号： H01L29/7811 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/66734 ,  H01L29/7813

摘要： According to an embodiment, a trench structure and a second semiconductor layer are provided in a semiconductor device. In the trench structure, a trench is provided in a surface of a device termination portion with a first semiconductor layer of a first conductive type including a device portion and the device termination portion, and an insulator is buried in the trench in such a manner to cover the trench. The second semiconductor layer, which is of a second conductive type, is provided on the surface of the first semiconductor layer, is in contact with at least a side on the device portion of the trench, and has a smaller depth than the trench. The insulator and a top passivation film for the semiconductor device are made of the same material.

摘要翻译： 根据实施例，在半导体器件中设置沟槽结构和第二半导体层。 在沟槽结构中，在器件端子部分的表面中设置沟槽，其中第一半导体层具有包括器件部分和器件端接部分的第一导电类型，并且绝缘体以这样的方式被掩埋在沟槽中： 覆盖沟槽。 具有第二导电类型的第二半导体层设置在第一半导体层的表面上，与沟槽的器件部分的至少一侧接触，并且具有比沟槽更小的深度。 用于半导体器件的绝缘体和顶部钝化膜由相同的材料制成。