公开(公告)号：US06021421A

公开(公告)日：2000-02-01

申请号：US802083

申请日：1997-02-19

申请人： Rafi Retter ,  Yonatan Manor ,  David Bar ,  Shlomo Mahlab ,  Ronny Aboutboul

发明人： Rafi Retter ,  Yonatan Manor ,  David Bar ,  Shlomo Mahlab ,  Ronny Aboutboul

IPC分类号： G06F17/10 ,  G06F17/15

CPC分类号： G06F17/10

摘要： An enhanced digital signal processor (EDSP) includes execution section that includes the following constituents: a processor, an arithmetic logic unit (ALU), a memory device for holding set of instructions for execution selected from enhanced set of instructions, a memory device for holding data, another clock generator for generating a plurality of clock signals coupled to above constituents. Internal communication bus coupled to the above constituents for affording controlled communication between them, a correlator, coupled to the bus, for communication with the execution section. The correlator having an input port for receiving external input data and an output port for outputting data. The correlator being controlled by the processor and being responsive to the selected instruction from the enhanced set of instructions, for operating in the following mode: correlator processing mode wherein the correlator receives data from the above constituents and outputs data to the constituents, and wherein the input data received through the input port, is transmitted to the output port in an intact form.

摘要翻译： 增强型数字信号处理器（EDSP）包括执行部分，其包括以下组成部分：处理器，算术逻辑单元（ALU），用于保持用于执行的用于执行的增强指令集的指令的存储器装置，用于保持 数据，另一个时钟发生器，用于产生耦合到上述组成部分的多个时钟信号。 内部通信总线耦合到上述组件以提供它们之间的受控通信，耦合到总线的相关器，用于与执行部分通信。 相关器具有用于接收外部输入数据的输入端口和用于输出数据的输出端口。 所述相关器由所述处理器控制并且响应来自所述增强指令集的所选择的指令，以在以下模式下操作：相关器处理模式，其中所述相关器从所述组成部分接收数据并向所述组成部分输出数据，并且其中， 通过输入端口接收的输入数据以完整的形式传输到输出端口。