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1.发明授权General numeric backtracking algorithm for solving satifiability problems to verify functionality of circuits and software 有权用于解决饱和度问题以验证电路和软件功能的通用数字回溯算法公开(公告)号：US08862439B1
公开(公告)日：2014-10-14
申请号：US12824081
申请日：2010-06-25
CPC分类号： G06F17/504 , G06F17/10
摘要： In one embodiment of the invention, a design verifier is disclosed including a model extractor and a bounded model checker having an arithmetic satisfiability solver. The arithmetic satisfiability solver searches for a solution in the form of a numeric assignment of numbers to variables that satisfies each and every one of the one or more numeric formulas. Conflict in the search, results in the deduction of one or more new numeric formulas that serve to guide the search toward a solution. If the search finds a numeric assignment that satisfies each and every one of the one or more numeric formulas, it indicates that a functional property of the system is violated.
摘要翻译： 在本发明的一个实施例中，公开了一种设计验证器，其包括模型提取器和具有算术可满足性求解器的有界模型检验器。 算术可满足性求解器以满足一个或多个数字公式中的每一个的变量的数字数字分配的形式搜索解决方案。 搜索冲突导致一个或多个新的数字公式的推导，用于指导搜索解决方案。 如果搜索找到满足一个或多个数字公式中的每一个的数字分配，则表示系统的功能属性被违反。
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2.发明授权Apparatus with general numeric backtracking algorithm for solving satisfiability problems to verify functionality of circuits and software 失效具有通用数字回溯算法的装置，用于解决满足性问题以验证电路和软件的功能公开(公告)号：US08656330B1
公开(公告)日：2014-02-18
申请号：US12970851
申请日：2010-12-16
IPC分类号： G06F17/50
CPC分类号： G06F17/504 , G06F17/10
摘要： In one embodiment of the invention, a design verifier is disclosed including a model extractor and a bounded model checker having an arithmetic satisfiability solver. The arithmetic satisfiability solver searches for a solution in the form of a numeric assignment of numbers to variables that satisfies each and every one of the one or more numeric formulas. Conflict in the search, results in the deduction of one or more new numeric formulas that serve to guide the search toward a solution. If the search finds a numeric assignment that satisfies each and every one of the one or more numeric formulas, it indicates that a functional property of the system is violated.
摘要翻译： 在本发明的一个实施例中，公开了一种设计验证器，其包括模型提取器和具有算术可满足性求解器的有界模型检验器。 算术可满足性求解器以满足一个或多个数字公式中的每一个的变量的数字数字分配的形式搜索解决方案。 搜索冲突导致一个或多个新的数字公式的推导，用于指导搜索解决方案。 如果搜索找到满足一个或多个数字公式中的每一个的数字分配，则表示系统的功能属性被违反。
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公开(公告)号：US5555412A
公开(公告)日：1996-09-10
申请号：US558496
申请日：1995-11-16
申请人： Keith V. Besaw , Robert J. Donovan , Shmuel Sagiv
发明人： Keith V. Besaw , Robert J. Donovan , Shmuel Sagiv
IPC分类号： G06F9/45
CPC分类号： G06F8/434
摘要： An aliasing method and apparatus carried out on a digital computer are provided for generating an object code from a source program. An aliasing data structure is defined and includes an initial empty check-list for each variable in the source program. A pseudo variable is constructed to represent each predefined large alias class. The pseudo variable is attached to the check-list of each variable included in the predefined alias class. Inverse alias checking upon use of a variable is provided using the check-lists for the variable.
摘要翻译： 提供了一种在数字计算机上执行的混叠方法和装置，用于从源程序生成目标代码。 定义了一个混叠数据结构，并包含源程序中每个变量的初始空检查列表。 构造伪变量来表示每个预定义的大型别名类。 伪变量附加到预定义别名类中包含的每个变量的检查列表。 使用变量的检查列表提供反向别名检查。
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公开(公告)号：US06301699B1
公开(公告)日：2001-10-09
申请号：US09271548
申请日：1999-03-18
申请人： Yona Hollander , Ophir Rahman , Shmuel Sagiv , Ury Segal
发明人： Yona Hollander , Ophir Rahman , Shmuel Sagiv , Ury Segal
IPC分类号： G06F100
CPC分类号： G06F21/55 , G06F21/577
摘要： Method for detecting buffer overflow weakness exploitation, including the steps of determining a plurality of threshold parameters, each respective to a buffer overflow weakness exploitation event, analyzing a code to be executed, thereby producing a plurality of validation values, comparing said validation values to the respective ones of the threshold parameters, and determining a buffer overflow weakness exploitation attempt, when at least one of the validation values exceeds the respective one of the threshold parameters.
摘要翻译： 用于检测缓冲区溢出弱点利用的方法，包括确定多个阈值参数的步骤，每个阈值参数分别对应于缓冲区溢出弱点利用事件，分析要执行的代码，由此产生多个验证值，将所述验证值与 相应的阈值参数，以及当至少一个验证值超过阈值参数中的相应一个时，确定缓冲区溢出弱点利用尝试。
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