公开(公告)号：US07057910B2

公开(公告)日：2006-06-06

申请号：US10715848

申请日：2003-11-19

申请人： Manabu Takahashi ,  Koji Kawamichi ,  Shohei Oishi ,  Masaru Kohara

发明人： Manabu Takahashi ,  Koji Kawamichi ,  Shohei Oishi ,  Masaru Kohara

IPC分类号： H02M7/20 ,  G01R31/26

CPC分类号： H02M1/38

摘要： In a semiconductor device for generating complementary PWM signals for, for example, controlling an inverter, a dead time is flexibly added by using a simple architecture. A dead time addition unit adds time elapsing until a value of a timer reaches a set value of a register as a first dead time at a rise of a first PWM signal. On the other hand, time elapsing until the value of the timer reaches a set value of another register is added as a second dead time at a rise of a second PWM signal.

摘要翻译： 在用于产生用于例如控制逆变器的互补PWM信号的半导体器件中，通过使用简单的架构灵活地添加死区时间。 死区时间添加单元增加时间经过，直到定时器的值达到寄存器的设定值为第一个PWM信号上升的第一个死区时间。 另一方面，直到定时器的值达到另一个寄存器的设定值为止的时间在第二个PWM信号的上升处被添加为第二死区时间。

公开(公告)号：US20060189011A1

公开(公告)日：2006-08-24

申请号：US11409208

申请日：2006-04-24

申请人： Manabu Takahashi ,  Koji Kawamichi ,  Shohei Oishi ,  Masaru Kohara

发明人： Manabu Takahashi ,  Koji Kawamichi ,  Shohei Oishi ,  Masaru Kohara

IPC分类号： H01L21/66 ,  H05K7/20

CPC分类号： H02M1/38

摘要： In a semiconductor device for generating complementary PWM signals for, for example, controlling an inverter, a dead time is flexibly added by using a simple architecture. A dead time addition unit adds time elapsing until a value of a timer reaches a set value of a register as a first dead time at a rise of a first PWM signal. On the other hand, time elapsing until the value of the timer reaches a set value of another register is added as a second dead time at a rise of a second PWM signal.