公开(公告)号：US08349693B2

公开(公告)日：2013-01-08

申请号：US13024347

申请日：2011-02-10

申请人： Takumi Shibata ,  Shouichi Yamauchi

发明人： Takumi Shibata ,  Shouichi Yamauchi

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/66734

摘要： A semiconductor device includes a silicon substrate having a (110)-oriented surface, a PN column layer disposed on the (110)-oriented surface, a channel-forming layer disposed on the PN column layer, a plurality of source regions disposed at a surface portion of the channel-forming layer, and gate electrodes penetrate through the channel-forming layer. The PN column layer includes first columns having a first conductivity type and second columns having a second conductivity type which are alternately arranged in such a manner that the first columns contact the second columns on (111)-oriented surfaces, respectively. The gate electrodes are adjacent to the source regions, respectively, and each of the gate electrodes has side surfaces that cross the contact surfaces of the first columns and the second columns in a plane of the silicon substrate.

摘要翻译： 半导体器件包括具有（110）取向表面的硅衬底，设置在（110）取向表面上的PN列层，设置在PN列层上的沟道形成层，设置在 沟道形成层的表面部分和栅电极穿过沟道形成层。 PN列层包括具有第一导电类型的第一列和具有第二导电类型的第二列，这些第一列以这样的方式交替布置，使得第一列分别在（111）取向的表面上接触第二列。 栅电极分别与源区相邻，并且每个栅电极具有在硅衬底的平面中与第一列和第二列的接触表面交叉的侧表面。

公开(公告)号：US20110136308A1

公开(公告)日：2011-06-09

申请号：US13024347

申请日：2011-02-10

申请人： Takumi Shibata ,  Shouichi Yamauchi

发明人： Takumi Shibata ,  Shouichi Yamauchi

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/66734

摘要： A semiconductor device includes a silicon substrate having a (110)-oriented surface, a PN column layer disposed on the (110)-oriented surface, a channel-forming layer disposed on the PN column layer, a plurality of source regions disposed at a surface portion of the channel-forming layer, and gate electrodes penetrate through the channel-forming layer. The PN column layer includes first columns having a first conductivity type and second columns having a second conductivity type which are alternately arranged in such a manner that the first columns contact the second columns on (111)-oriented surfaces, respectively. The gate electrodes are adjacent to the source regions, respectively, and each of the gate electrodes has side surfaces that cross the contact surfaces of the first columns and the second columns in a plane of the silicon substrate.

摘要翻译： 半导体器件包括具有（110）取向表面的硅衬底，设置在（110）取向表面上的PN列层，设置在PN列层上的沟道形成层，设置在 沟道形成层的表面部分和栅电极穿过沟道形成层。 PN列层包括具有第一导电类型的第一列和具有第二导电类型的第二列，这些第一列以这样的方式交替布置，使得第一列分别在（111）取向的表面上接触第二列。 栅电极分别与源区相邻，并且每个栅电极具有在硅衬底的平面中与第一列和第二列的接触表面交叉的侧表面。

公开(公告)号：US07915671B2

公开(公告)日：2011-03-29

申请号：US12153032

申请日：2008-05-13

申请人： Takumi Shibata ,  Shouichi Yamauchi

发明人： Takumi Shibata ,  Shouichi Yamauchi

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/66734

摘要： A semiconductor device includes a silicon substrate having a (110)-oriented surface, a PN column layer disposed on the (110)-oriented surface, a channel-forming layer disposed on the PN column layer, a plurality of source regions disposed at a surface portion of the channel-forming layer, and gate electrodes penetrate through the channel-forming layer. The PN column layer includes first columns having a first conductivity type and second columns having a second conductivity type which are alternately arranged in such a manner that the first columns contact the second columns on (111)-oriented surfaces, respectively. The gate electrodes are adjacent to the source regions, respectively, and each of the gate electrodes has side surfaces that cross the contact surfaces of the first columns and the second columns in a plane of the silicon substrate.

摘要翻译： 半导体器件包括具有（110）取向表面的硅衬底，设置在（110）取向表面上的PN列层，设置在PN列层上的沟道形成层，设置在 沟道形成层的表面部分和栅电极穿过沟道形成层。 PN列层包括具有第一导电类型的第一列和具有第二导电类型的第二列，这些第一列以这样的方式交替布置，使得第一列分别在（111）取向的表面上接触第二列。 栅电极分别与源区相邻，并且每个栅电极具有在硅衬底的平面中与第一列和第二列的接触表面交叉的侧表面。

公开(公告)号：US20080303114A1

公开(公告)日：2008-12-11

申请号：US12155485

申请日：2008-06-05

申请人： Takumi Shibata ,  Shouichi Yamauchi ,  Syouji Nogami ,  Tomonori Yamaoka

发明人： Takumi Shibata ,  Shouichi Yamauchi ,  Syouji Nogami ,  Tomonori Yamaoka

IPC分类号： H01L29/06 ,  H01L21/761

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/66734

摘要： A semiconductor device is provided, which includes a substrate; a P-N column layer disposed on the substrate; a second conductivity type epitaxial layer disposed on the P-N column layer. The P-N column layer includes first conductivity type columns and second conductivity type columns, which are alternately arranged. Each column has a tapered shape. A portion of the first conductivity type column located around the substrate has a smaller impurity concentration than another portion of the first conductivity type column located around the second conductivity type epitaxial layer. A portion of the second conductivity type column located around the substrate has a larger impurity concentration than another portion of the first conductivity type column located around the second conductivity type epitaxial layer.

摘要翻译： 提供了一种半导体器件，其包括衬底; 设置在所述基板上的P-N列层; 设置在P-N柱层上的第二导电型外延层。 P-N柱层包括交替排列的第一导电型列和第二导电型列。 每列都有锥形。 位于基板周围的第一导电型列的一部分具有比位于第二导电型外延层周围的第一导电型列的另一部分更小的杂质浓度。 位于基板周围的第二导电型列的一部分具有比位于第二导电型外延层周围的第一导电型列的另一部分更大的杂质浓度。

公开(公告)号：US08097511B2

公开(公告)日：2012-01-17

申请号：US12155485

申请日：2008-06-05

申请人： Takumi Shibata ,  Shouichi Yamauchi ,  Syouji Nogami ,  Tomonori Yamaoka

发明人： Takumi Shibata ,  Shouichi Yamauchi ,  Syouji Nogami ,  Tomonori Yamaoka

IPC分类号： H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/66734

摘要： A semiconductor device is provided, which includes a substrate; a P-N column layer disposed on the substrate; a second conductivity type epitaxial layer disposed on the P-N column layer. The P-N column layer includes first conductivity type columns and second conductivity type columns, which are alternately arranged. Each column has a tapered shape. A portion of the first conductivity type column located around the substrate has a smaller impurity concentration than another portion of the first conductivity type column located around the second conductivity type epitaxial layer. A portion of the second conductivity type column located around the substrate has a larger impurity concentration than another portion of the first conductivity type column located around the second conductivity type epitaxial layer.

摘要翻译： 提供了一种半导体器件，其包括衬底; 设置在所述基板上的P-N列层; 设置在P-N柱层上的第二导电型外延层。 P-N柱层包括交替排列的第一导电型列和第二导电型列。 每列都有锥形。 位于基板周围的第一导电型列的一部分具有比位于第二导电型外延层周围的第一导电型列的另一部分更小的杂质浓度。 位于基板周围的第二导电型列的一部分具有比位于第二导电型外延层周围的第一导电型列的另一部分更大的杂质浓度。

公开(公告)号：US20080283912A1

公开(公告)日：2008-11-20

申请号：US12153032

申请日：2008-05-13

申请人： Takumi Shibata ,  Shouichi Yamauchi

发明人： Takumi Shibata ,  Shouichi Yamauchi

IPC分类号： H01L29/00 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/66734

摘要： A semiconductor device includes a silicon substrate having a (110)-oriented surface, a PN column layer disposed on the (110)-oriented surface, a channel-forming layer disposed on the PN column layer, a plurality of source regions disposed at a surface portion of the channel-forming layer, and gate electrodes penetrate through the channel-forming layer. The PN column layer includes first columns having a first conductivity type and second columns having a second conductivity type which are alternately arranged in such a manner that the first columns contact the second columns on (111)-oriented surfaces, respectively. The gate electrodes are adjacent to the source regions, respectively, and each of the gate electrodes has side surfaces that cross the contact surfaces of the first columns and the second columns in a plane of the silicon substrate.

摘要翻译： 半导体器件包括具有（110）取向表面的硅衬底，设置在（110）取向表面上的PN列层，设置在PN列层上的沟道形成层，设置在 沟道形成层的表面部分和栅电极穿过沟道形成层。 PN列层包括具有第一导电类型的第一列和具有第二导电类型的第二列，这些第一列以这样的方式交替布置，使得第一列分别在（111）取向的表面上接触第二列。 栅电极分别与源区相邻，并且每个栅电极具有在硅衬底的平面中与第一列和第二列的接触表面交叉的侧表面。