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    Microprocessor system with memory device including a DMAC, and a bus for DMA transfer of data between memory devices
    3.
    发明申请
    Microprocessor system with memory device including a DMAC, and a bus for DMA transfer of data between memory devices 审中-公开
    具有包含DMAC的存储器件的微处理器系统和用于在存储器件之间DMA传输数据的总线

    公开(公告)号：US20060090017A1

    公开(公告)日：2006-04-27

    申请号：US11141091

    申请日：2005-05-31

    申请人： Siyoung Kim ,  Kyungwoo Nam ,  Myung-Gyoo Won ,  Yunsoo Lee ,  Jongwon Lee ,  Yanghoon Jung

    发明人： Siyoung Kim ,  Kyungwoo Nam ,  Myung-Gyoo Won ,  Yunsoo Lee ,  Jongwon Lee ,  Yanghoon Jung

    IPC分类号： G06F13/28

    CPC分类号： G06F13/28 ,  G06F13/1605 ,  G06F13/1684 ,  Y02D10/14

    摘要： A processor system having a memory device including a (RAM) memory and a direct memory access controller (DMAC) and an internal bus switchably connected between the memory and the DMAC. A Bus Switch (multiplexer) within the memory device alternately establishes a first data transmission path over the system bus between the memory and an external processor, and a second data transmission path over the internal bus between the memory and the DMAC. The first data transmission path, when established through the Bus Switch, supports random access of the memory by the external processor. The second data transmission path, when established through the Bus Switch, supports a Direct Memory Access (DMA) between the RAM and an external storage device, e.g., a Nonvolatile Memory (NVM), connected to the DMAC while the processor has full and exclusive use of the system bus.

    摘要翻译： 一种处理器系统，具有包括（RAM）存储器和直接存储器存取控制器（DMAC）的存储器件以及可切换地连接在存储器和DMAC之间的内部总线。 存储器装置内的总线开关（多路复用器）交替地在存储器和外部处理器之间的系统总线上建立第一数据传输路径，以及在存储器和DMAC之间的内部总线上的第二数据传输路径。 当通过总线交换机建立时，第一个数据传输路径支持外部处理器对存储器的随机访问。 当通过总线开关建立时，第二数据传输路径支持RAM和外部存储设备（例如，非易失性存储器（NVM））之间的直接存储器访问（DMA），其连接到DMAC，而处理器具有完整和独占性 使用系统总线。