公开(公告)号：US08694944B1

公开(公告)日：2014-04-08

申请号：US12643528

申请日：2009-12-21

申请人： Sze Huey Soo ,  Thow Pang Chong ,  Boon Jin Ang ,  Kar Keng Chua

发明人： Sze Huey Soo ,  Thow Pang Chong ,  Boon Jin Ang ,  Kar Keng Chua

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F17/504 ,  G06F17/5054

摘要： Methods, computer program products, and systems are disclosed associated with calculating a routability metric for a second IC design using inputs from the compilation to a first IC design. The first and second IC designs are alternative implementation options for a user circuit design, such as FPGA and structured ASIC options. Information about user design demands on routing resources of one IC design are considered along with information about the projected supply of routing resources in another IC design, to produce a routing metric. The routing metric may be mapped to a degree of difficulty indicator, and either may be used to condition a compile of the user circuit to the second IC design or be used in other ways.

摘要翻译： 公开了使用从汇编到第一IC设计的输入来计算第二IC设计的可路由度量的方法，计算机程序产品和系统。 第一和第二IC设计是用户电路设计的替代实现选项，例如FPGA和结构化ASIC选项。 关于一个IC设计的路由资源的用户设计需求的信息以及关于在另一个IC设计中的路由资源的预计供应的信息，以产生路由度量。 路由度量可以映射到难度指标，并且可以用于将用户电路的编译调节到第二IC设计或以其他方式使用。