Abstract:
A network transmitting apparatus and a power saving method thereof are provided. The network transmitting apparatus includes a chip, a transformer, and a power regulating unit. The chip includes a detecting and controlling unit, an analog circuit, and a digital circuit. The detecting and controlling unit receives a received signal and detects the received signal and a state of the chip to generate a first control signal. The transformer has a first side coupled to the chip and a second side. The power regulating unit coupled to the detecting and controlling unit and a center tap of the first side of the transformer is used for receiving a voltage, generating a first regulated voltage according to the first control signal, and connecting the first regulated voltage to the center tap of the first side of the transformer, the analog circuit, and the digital circuit.
Abstract:
A line transceiver apparatus for multiple transmission standards including a operational amplifier (OP-AMP), a transformer unit, a first variable resistor unit to a sixth variable resistor unit, and a variable resistor control unit is provided. The first resistor and the second resistor are coupled between transmission nodes of the line transceiver apparatus and input nodes of the OP-AMP, and the load nodes of the transformer unit are receiving nodes of the line transceiver apparatus. The variable resistor control unit adjusts the impedances of the first variable resistor unit to the sixth variable resistor unit according to a transmission standard selection signal so as to enable the line transceiver apparatus to support multiple transmission standards.
Abstract:
A network transmitting apparatus and a power saving method thereof are provided. The network transmitting apparatus includes a chip, a transformer, and a power regulating unit. The chip includes a detecting and controlling unit, an analog circuit, and a digital circuit. The detecting and controlling unit receives a received signal and detects the received signal and a state of the chip to generate a first control signal. The transformer has a first side coupled to the chip and a second side. The power regulating unit coupled to the detecting and controlling unit and a center tap of the first side of the transformer is used for receiving a voltage, generating a first regulated voltage according to the first control signal, and connecting the first regulated voltage to the center tap of the first side of the transformer, the analog circuit, and the digital circuit.
Abstract:
An echo canceller and an echo cancellation method are provided. In the echo cancellation method, a transmitting data sequence is received, and M taps are provided accordingly. In addition, the M taps are received, and N taps are output according to an echo distribution information, in which the M and N are natural numbers, and M>N. Besides, the N taps are multiplied by N tap coefficients respectively to generate N products. Further, the N products are summed up to generate an echo cancellation signal. Thereby, the cost of the echo cancellation is decreased.
Abstract:
A transceiver and an echo cancellation method are disclosed. The echo cancellation method includes producing an echo cancellation signal according to a transmission signal; adjusting the amplitude, the delay time or a combination of the amplitude and the delay time of the echo cancellation signal according to an adjusting parameter; receiving an echo signal derived from the transmission signal and performing a subtraction operation on the echo signal by using the echo cancellation signal so as to obtain an echo residual; and producing the adjusting parameter according to the echo residual. The provided method can effectively reduce the interference caused by the echo signal.
Abstract:
A DC wander canceling device is provided for canceling DC wander. The DC wander canceling device comprises an analog front end, an equalizer, a slicer, and a digital/analog DC wander canceller. The digital/analog DC wander canceller is coupled to the slicer and the analog front end for receiving a sliced signal. According to the difference of the received sliced signal and the input signal of the slicer, the digital/analog DC wander canceller compensates the equalized signal to cancel a digital DC wander, and also cancel an analog DC wander at the input of the analog front end, to enhance the accuracy of signal demodulation.
Abstract:
A transceiver device and a power saving method thereof are provided. The transceiver device includes a transmitter, a receiver, and a control module. The control module is coupled to the transmitter and the receiver. After the control module lowers the output power of either the transmitter, the receiver, or both of them, the control module checks a signal transmission between the transceiver device and a far-end device is normal or not. When the signal transmission between the transceiver device and the far-end device is abnormal, the control module readjusts the output power of the transmitter, the receiver, or both of them. Thereby, the power consumption of the transceiver device is decreased.
Abstract:
A transceiver device and a power saving method thereof are provided. The transceiver device includes a transmitter, a receiver, and a control module. The control module is coupled to the transmitter and the receiver. After the control module lowers the output power of either the transmitter, the receiver, or both of them, the control module checks a signal transmission between the transceiver device and a far-end device is normal or not. When the signal transmission between the transceiver device and the far-end device is abnormal, the control module readjusts the output power of the transmitter, the receiver, or both of them. Thereby, the power consumption of the transceiver device is decreased.
Abstract:
A method and an apparatus for reducing the area and shortening the critical path of Viterbi circuits in Gigabit Ethernet systems. The present invention replaces the complex four-dimensional Euclidean distance with a simple sum of distances in each dimension as the distance criterion when a slicer is selecting the closest PAM-5 constellation point according to output voltages from an equalizer, thereby simplifying the design of Viterbi circuits.
Abstract:
A look-ahead equalizer is provided. The equalizer has an equalizer without a first tap, a look-ahead unit, and a slicer unit. The equalizer without a first tap outputs a pre-filter output and a state reference signal. The look-ahead unit is coupled to the output of the equalizer without a first tap for generating a first, a second, and a third equalizer look-ahead values according to the state reference signal. The slicer unit is coupled to the look-ahead unit. The slicer unit comprises plural state slicer units. Each state slicer unit receives the first, the second, and the third equalizer look-ahead values, and then selects one of them according to a comparison result of the state slicer unit and the state reference signal.