公开(公告)号：US20180367347A1

公开(公告)日：2018-12-20

申请号：US16061202

申请日：2016-12-07

申请人： KNORR-BREMSE SYSTEME FUER NUTZFAHRZEUGE GMBH

发明人： Wolfgang Gscheidle

IPC分类号： H04L25/02 ,  G06F13/40 ,  H04L12/40

CPC分类号： H04L25/0278 ,  G06F13/4086 ,  H04L12/40032 ,  H04L25/0298 ,  H04L2012/40215

摘要： An electronic circuit arrangement, by which a line termination or terminating resistor of a serial bus, for example a CAN bus, is implemented in a switchable manner and can be electronically connected or disconnected by electronically operating switching elements and a microcontroller, or a computer port of the latter, which is present in an electronic control unit.

公开(公告)号：US20180294897A1

公开(公告)日：2018-10-11

申请号：US16008270

申请日：2018-06-14

申请人： AT&T Intellectual Property I, L.P.

发明人： Giovanni Vannucci ,  Peter Wolniansky ,  Paul Shala Henry ,  Robert Bennett ,  Farhad Barzegar ,  Irwin Gerszberg ,  Donald J. Barnickel ,  Thomas M. Willis, III

IPC分类号： H04B17/10 ,  H04L25/02 ,  H01Q13/28 ,  H01P3/10 ,  H01Q13/24 ,  H04B3/56 ,  H01P1/00 ,  H04B3/54 ,  H01P5/00

CPC分类号： H04B17/101 ,  H01P1/00 ,  H01P3/10 ,  H01P5/00 ,  H01Q1/46 ,  H01Q13/24 ,  H01Q13/28 ,  H04B3/54 ,  H04B3/56 ,  H04B2203/5495 ,  H04L25/0278

摘要： Aspects of the subject disclosure may include, a system that obtains a group of signals that are each representative of a corresponding one of a group of electromagnetic waves, analyzes the group of signals to determine signal characteristics, and determines, according to the signal characteristics, predicted characteristics for a communication signal that is to be transmitted by a circuit. Other embodiments are disclosed.

公开(公告)号：US10063232B1

公开(公告)日：2018-08-28

申请号：US15703767

申请日：2017-09-13

申请人： Xilinx, Inc.

发明人： Sing-Keng Tan ,  Xiaobao Wang

IPC分类号： H03K19/0185 ,  H03K19/003 ,  H04L25/02 ,  H03K19/00

CPC分类号： H03K19/00384 ,  H03K19/0005 ,  H03K19/0185 ,  H04L25/0278

摘要： A transmitter includes: a driver circuit having a pull-up circuit, and a pull-down circuit, coupled to an output pad; a digitally controlled impedance (DCI) calibration circuit having a first reference driver, a second reference driver, and a reference resistor, the DCI calibration circuit configured to: generate a value for a first code by calibrating a first impedance in the first reference driver against the reference resistor; generate a value for a second code by calibrating a second impedance in the second reference driver against the first impedance; and adjust the value of the first code to match the first impedance with the second impedance; and a pre-driver circuit configured to supply the first code and the second code to the driver circuit for adjusting output impedance of the pull-up circuit and the pull-down circuit.

公开(公告)号：US10009193B2

公开(公告)日：2018-06-26

申请号：US14628323

申请日：2015-02-23

申请人： Photonic Systems, Inc.

发明人： Charles H. Cox

IPC分类号： H04L25/02

CPC分类号： H04L25/0278 ,  H04L25/0272

摘要： A power transfer electrical system includes an electrical signal source that generates a current at an output. An electrical load is electrically connected to the output of the electrical signal source. An output of a controllable voltage source is also electrically connected to the electrical load. The controllable voltage source generates a voltage that is proportional to the current generated by the electrical signal source. An input of a controller is electrically connected to the output of the electrical signal source and an output of the controller is electrically connected to a control input of the controllable voltage source. The controller generates a signal that controls the voltage generated by the controllable voltage source so that a desirable amount of power is transferred from the electrical signal source to the controllable voltage source.

公开(公告)号：US09959899B2

公开(公告)日：2018-05-01

申请号：US15632766

申请日：2017-06-26

申请人： LAPIS SEMICONDUCTOR CO., LTD.

发明人： Yukihiro Kita

IPC分类号： H03M5/00 ,  G11B20/10 ,  H04B3/14 ,  H04L25/02 ,  G11B15/18 ,  G11B27/30 ,  G11B27/00

CPC分类号： G11B20/10037 ,  G11B15/1875 ,  G11B27/005 ,  G11B27/3027 ,  H04B3/141 ,  H04L25/0272 ,  H04L25/0278

摘要： A signal conversion device includes a first converting section configured to convert a clock signal input through a first signal line, a data signal input through a second signal line, and a control signal input through a third signal line, into pulse signals including a first pulse train and a second pulse train; and a transmitting section configured to transmit the first pulse train through a fourth signal line and the second pulse train through a fifth signal line, wherein the control signal is a signal that, through a level transition, causes a control target device to switch between an active state and an inactive state, and wherein the first converting section is configured to put successive pulses into at least one of the first pulse train and the second pulse train in response to the level transition of the control signal.

公开(公告)号：US20180083624A1

公开(公告)日：2018-03-22

申请号：US15708430

申请日：2017-09-19

申请人： MediaTek Singapore Pte. Ltd.

发明人： Yiming TANG ,  Bo HU ,  Kun LAN

IPC分类号： H03K19/00 ,  H04L25/02 ,  H03K19/0175 ,  H03K19/003 ,  H03K19/09 ,  H03K3/356

CPC分类号： H03K19/0005 ,  H03K3/35613 ,  H03K19/003 ,  H03K19/017545 ,  H03K19/018514 ,  H03K19/09 ,  H03K19/09432 ,  H04L25/0272 ,  H04L25/0276 ,  H04L25/0278 ,  H04L25/028 ,  H04L25/0282

摘要： A current-mode logic circuit is provided. The current-mode logic circuit includes a transmitter module. The transmitter module includes an output impedance circuit, a switch circuit, and a current source. The output impedance circuit provides an adjustable output resistor. The adjustable output resistor includes floating resistors and/or pull-up resistors. The switch circuit is coupled to the output impedance circuit. The switch circuit receives differential input signals, outputs differential output signals, and controls high-low level switching of the differential input signals and the differential output signals according to the adjustable output resistor. The current source is coupled to the output impedance circuit and the switch circuit. The current source provides currents to the output impedance circuit and the switch circuit. The floating resistors are resistors coupled between the differential output signals, and the pull-up resistors are resistors coupled between the differential output signals and a power source.

公开(公告)号：US09906209B2

公开(公告)日：2018-02-27

申请号：US15498525

申请日：2017-04-27

申请人： MEDIATEK Inc.

发明人： Keng-Meng Chang ,  Yao-Chi Wang

IPC分类号： H03K19/003 ,  H04B1/00 ,  H03L7/00 ,  H03H11/30 ,  H03K5/159 ,  H03K19/0175 ,  H03K19/00 ,  H04B1/04 ,  H04B1/16 ,  H04L25/02 ,  H03L1/02 ,  H03L7/18 ,  H03L7/10 ,  H03L7/113 ,  H03K19/21

CPC分类号： H03H11/30 ,  H03K5/159 ,  H03K19/0005 ,  H03K19/017545 ,  H03K19/21 ,  H03L1/00 ,  H03L1/022 ,  H03L7/0816 ,  H03L7/103 ,  H03L7/113 ,  H03L7/18 ,  H04B1/0475 ,  H04B1/1638 ,  H04L25/0278 ,  H04L25/028 ,  H04L25/0292

摘要： A biased impedance circuit, an impedance adjustment circuit, and an associated signal generator are provided. The biased impedance circuit is coupled to a summation node and applies a biased impedance to the summation node. A periodic input signal is received at the summation node. The biased impedance circuit includes a switching circuit for receiving an output window signal, wherein a period of the output window signal is shorter than a period of the periodic input signal. The switching circuit includes a low impedance path and a high impedance path. The low impedance sets the biased impedance to a first impedance when the output window signal is at a first voltage level. The high impedance path sets the biased impedance to a second impedance when the output window signal is at a second voltage level. The first impedance is less than the second impedance.

公开(公告)号：US20170338817A1

公开(公告)日：2017-11-23

申请号：US15612455

申请日：2017-06-02

申请人： Rambus Inc.

发明人： Huy Nguyen

IPC分类号： H03K19/00 ,  H04B1/04 ,  H04L25/02

CPC分类号： H03K19/0005 ,  H04B1/0458 ,  H04L25/0278 ,  H04L25/0298

摘要： Described are integrated-circuit die with differential receivers, the inputs of which are coupled to external signal pads. Termination legs coupled to the signal pads support multiple termination topologies. These termination legs can support adjustable impedances, capacitances, or both, which may be controlled using an integrated memory.

公开(公告)号：US09819384B2

公开(公告)日：2017-11-14

申请号：US14522169

申请日：2014-10-23

申请人： Avago Technologies General IP (Singapore) Pte. Ltd.

发明人： Hongya Xu ,  Andriy Yatsenko ,  Lueder Elbrecht ,  Martin Handtmann

IPC分类号： H04B1/46 ,  H04B1/48 ,  H04L25/02 ,  H04B1/10 ,  H04B1/18

CPC分类号： H04B1/48 ,  H04B1/1036 ,  H04B1/109 ,  H04B1/18 ,  H04B2001/1063 ,  H04B2001/485 ,  H04L25/0278

摘要： A multiplexer device includes an antenna node connected to an antenna for at least one of receiving and transmitting signals; multiple band pass filters connected to the antenna node, each band pass filter having a different passband; and multiple notch filters connected in to the antenna node and the multiple band pass filters, each notch filter having a different stopband corresponding to one of the passbands of the band pass filters. The notch filters are connected in parallel with one another in order to reduce insertion loss.

公开(公告)号：US09780741B2

公开(公告)日：2017-10-03

申请号：US15181588

申请日：2016-06-14

申请人： SKYWORKS SOLUTIONS, INC.

发明人： David Steven Ripley ,  Philip John Lehtola

IPC分类号： H03F3/04 ,  H03F3/21 ,  H03F1/56 ,  H03F1/32 ,  H04B1/04 ,  H04L27/04 ,  H03F1/02 ,  H03F1/22 ,  H03F3/191 ,  H03F3/24 ,  H03F3/19 ,  H04B1/40 ,  H04L25/02

CPC分类号： H03F1/32 ,  H03F1/0211 ,  H03F1/0227 ,  H03F1/0261 ,  H03F1/22 ,  H03F1/30 ,  H03F1/302 ,  H03F1/56 ,  H03F3/19 ,  H03F3/191 ,  H03F3/21 ,  H03F3/24 ,  H03F3/245 ,  H03F2200/171 ,  H03F2200/451 ,  H03F2200/462 ,  H03F2200/555 ,  H03F2200/78 ,  H03G3/3042 ,  H04B1/0475 ,  H04B1/40 ,  H04B2001/0408 ,  H04L25/0278 ,  H04L27/04

摘要： Compression control of cascode power amplifiers. A power amplifier module can include a power amplifier including a cascode transistor pair. The cascode transistor pair can include a first transistor and a second transistor. The power amplifier module can include a current comparator configured to compare a first base current of the first transistor and a second base current of the second transistor to generate a comparison signal. The power amplifier module can include a saturation controller configured to maintain the power amplifier out of saturation based on the comparison signal.