摘要:
A stretch-resistant occlusive device, and method of manufacturing such a device, having a helically wound coil defining a coil lumen extending along the entire axial length of the coil from a proximal end portion to a distal end portion. The device further includes a headpiece having a proximal end, a distal end attached to the proximal end portion of the coil, and a headpiece lumen extending between the proximal and distal ends of the headpiece. An anchor filament extends through the headpiece lumen, has at least one proximal end secured to the proximal end of the headpiece, and has a distal portion defining an eye positioned distal to the distal end of the headpiece. A stretch resistant member is positioned within the coil lumen, has a proximal portion extending through the eye, and has at least one distal end secured to the distal end of the coil.
摘要:
A system for delivering an expandable implant into the vasculature of a patient, including an elongated core element having a proximal end accessible exterior to the patient and a distal end including at least one feature for engaging a proximal portion of the implant in a collapsed state. The system further includes an expansion limiter having an inner diameter and a length sufficient to cover the proximal portion of the implant and to retain the proximal portion in the collapsed state, and at least one elongated member having a distal end connected to the expansion limiter and a proximal end accessible exterior to the patient to enable proximal movement of the expansion limiter to release the implant.
摘要:
The invention presents a method for a processor (1), and a processor comprising a processing pipeline (2) and at least one interface (3) for data packets. The method is characterized by giving a second data packet (D2) admittance to the pipeline (2) in dependence on cost information (c1), dependent upon an expected time period of residence of a first data packet (D1) in at least a part (P1, . . . , PK) of the pipeline (2). The first data packet (D1) can be identical with the second data packet, but preferably, the first data packet (D1) enters the pipeline (2) before the second data packet (D2).
摘要:
The disclosed embodiments relate to a packet-processing system. This system includes an input which is configured to receive packets, wherein the packets include control-message (CM) packets and traffic packets. It also includes a pipeline to process the packets, wherein the pipeline includes access points for accessing an engine which services requests for packets, wherein CM packets and traffic packets access the engine through different access points. The system additionally includes an arbiter to schedule packets entering the pipeline. While scheduling the packets, the arbiter is configured to account for empty slots in the pipeline to ensure that when CM packets and traffic packets initiate accesses to the engine through different access points, the accesses do not cause an overflow at an input queue for the engine.
摘要:
A system for delivering an expandable implant into the vasculature of a patient, including an elongated core element having a proximal end accessible exterior to the patient and a distal end including at least one feature for engaging a proximal portion of the implant in a collapsed state. The system further includes an expansion limiter having an inner diameter and a length sufficient to cover the proximal portion of the implant and to retain the proximal portion in the collapsed state, and at least one elongated member having a distal end connected to the expansion limiter and a proximal end accessible exterior to the patient to enable proximal movement of the expansion limiter to release the implant.
摘要:
The present invention relates to a method and apparatus for pipelined processing of data. When a data packet containing information is received by a processor operating according to pipelined processing, bits are added to the data packet and an intermediate packet, comprising more bits than the received data packet, is generated. To the intermediate packet is associated information reference, the information reference comprising information regarding the length and position of the information in the intermediate packet. As the intermediate packet is processed, changes to the intermediate packet resulting in changes of the length or the position of the information in the intermediate packet will trigger changes of the information reference. When the intermediate packet exits the processor, superfluous bits are removed.
摘要:
A stretch-resistant occlusive device, and method of manufacturing such a device, having a helically wound coil defining a coil lumen extending along the entire axial length of the coil from a proximal end portion to a distal end portion. The device further includes a headpiece having a proximal end, a distal end attached to the proximal end portion of the coil, and a headpiece lumen extending between the proximal and distal ends of the headpiece. An anchor filament extends through the headpiece lumen, has at least one proximal end secured to the proximal end of the headpiece, and has a distal portion defining an eye positioned distal to the distal end of the headpiece. A stretch resistant member is positioned within the coil lumen, has a proximal portion extending through the eye, and has at least one distal end secured to the distal end of the coil.
摘要:
A method in a processor is presented, in which data is processed in a pipelined manner, the data being included in a plurality of contexts, comprising a first (3), in addition to which a plurality of operations is adapted to be executed on the contexts. The method comprises executing an initial operation step (6a) of a first operation on the first context (3), and subsequently commencing an execution of an initial operation step (7a) of a second operation on the first context before an execution on the first context (3) of a following operation step (6b) of the first operation is completed.
摘要:
The present invention relates to a method and apparatus for pipelined processing of data. When a data packet containing information is received by a processor operating according to pipelined processing, bits are added to the data packet and an intermediate packet, comprising more bits than the received data packet, is generated. To the intermediate packet is associated information reference, the information reference comprising information regarding the length and position of the information in the intermediate packet. As the intermediate packet is processed, changes to the intermediate packet resulting in changes of the length or the position of the information in the intermediate packet will trigger changes of the information reference. When the intermediate packet exits the processor, superfluous bits are removed.