Fractional Interpolative Timing Advance and Retard Control in a Transceiver
    1.
    发明申请
    Fractional Interpolative Timing Advance and Retard Control in a Transceiver 有权
    收发器中的分数插值定时提前和延迟控制

    公开(公告)号:US20100027729A1

    公开(公告)日:2010-02-04

    申请号:US12411482

    申请日:2009-03-26

    IPC分类号: H04L7/00

    CPC分类号: H04W56/0045

    摘要: Transmission of information between user equipment (UE) and base stations in a wireless network occurs using a stream of periodic data. A modem in the UE operates synchronized to a first clock source to produce the stream of periodic data at a chip rate. Transceiver circuitry is synchronized to a variable clock source to receive the stream of data from the first circuitry at a rate according to the variable clock source. A fixed phase relationship is maintained between the variable clock source and the first clock source while the data period is uniform by adjusting the variable clock in response to detected phase errors. Occasionally, one period of the periodic data is changed by a defined amount. The fixed phase relationship is restored over a number of periods in a gradual manner by changing the frequency of the variable clock by an amount. By restoring the phase relationship gradually, quality degradation of the transmitted signal is reduced.

    摘要翻译: 使用周期性数据流在无线网络中的用户设备(UE)与基站之间传输信息。 UE中的调制解调器与第一时钟源同步,以码片速率产生周期性数据流。 收发器电路与可变时钟源同步,以根据可变时钟源的速率从第一电路接收数据流。 通过根据检测到的相位误差调整可变时钟,在可变时钟源和第一时钟源之间保持固定的相位关系,同时数据周期是均匀的。 有时,周期性数据的一个周期被改变一定的量。 通过将可变时钟的频率改变一定量,以逐渐的方式在多个周期内恢复固定相位关系。 通过逐渐恢复相位关系,传输信号的质量劣化降低。

    Fractional interpolative timing advance and retard control in a transceiver
    2.
    发明授权
    Fractional interpolative timing advance and retard control in a transceiver 有权
    收发器中的分数内插定时提前和延迟控制

    公开(公告)号:US08306174B2

    公开(公告)日:2012-11-06

    申请号:US12411482

    申请日:2009-03-26

    IPC分类号: H04L7/00

    CPC分类号: H04W56/0045

    摘要: Transmission of information between user equipment (UE) and base stations in a wireless network occurs using a stream of periodic data. A modem in the UE operates synchronized to a first clock source to produce the stream of periodic data at a chip rate. Transceiver circuitry is synchronized to a variable clock source to receive the stream of data from the first circuitry at a rate according to the variable clock source. A fixed phase relationship is maintained between the variable clock source and the first clock source while the data period is uniform by adjusting the variable clock in response to detected phase errors. Occasionally, one period of the periodic data is changed by a defined amount. The fixed phase relationship is restored over a number of periods in a gradual manner by changing the frequency of the variable clock by an amount. By restoring the phase relationship gradually, quality degradation of the transmitted signal is reduced.

    摘要翻译: 使用周期性数据流在无线网络中的用户设备(UE)与基站之间传输信息。 UE中的调制解调器与第一时钟源同步,以码片速率产生周期性数据流。 收发器电路与可变时钟源同步,以根据可变时钟源的速率从第一电路接收数据流。 通过根据检测到的相位误差调整可变时钟,在可变时钟源和第一时钟源之间保持固定的相位关系,同时数据周期是均匀的。 有时,周期性数据的一个周期被改变一定的量。 通过将可变时钟的频率改变一定量,以逐渐的方式在多个周期内恢复固定相位关系。 通过逐渐恢复相位关系,传输信号的质量劣化降低。