Silicon-on-insulator substrate with built-in substrate junction
    1.
    发明授权
    Silicon-on-insulator substrate with built-in substrate junction 有权
    具有内置衬底结的绝缘体上硅衬底

    公开(公告)号:US08482009B2

    公开(公告)日:2013-07-09

    申请号:US13093034

    申请日:2011-04-25

    IPC分类号: H01L29/786

    摘要: A method of forming a SOI substrate, diodes in the SOI substrate and electronic devices in the SOI substrate and an electronic device formed using the SOI substrate. The method of forming the SOI substrate includes forming an oxide layer on a silicon first substrate; ion-implanting hydrogen through the oxide layer into the first substrate, to form a fracture zone in the substrate; forming a doped dielectric bonding layer on a silicon second substrate; bonding a top surface of the bonding layer to a top surface of the oxide layer; thinning the first substrate by thermal cleaving of the first substrate along the fracture zone to form a silicon layer on the oxide layer to formed a bonded substrate; and heating the bonded substrate to drive dopant from the bonding layer into the second substrate to form a doped layer in the second substrate adjacent to the bonding layer.

    摘要翻译: 形成SOI衬底的方法,SOI衬底中的二极管和SOI衬底中的电子器件以及使用SOI衬底形成的电子器件。 形成SOI衬底的方法包括在硅第一衬底上形成氧化层; 将氢离子注入到氧化物层进入第一衬底中,以在衬底中形成断裂区; 在硅第二衬底上形成掺杂的电介质结合层; 将所述结合层的顶表面结合到所述氧化物层的顶表面; 通过沿着断裂区域热裂解第一基板来使第一基板变薄,以在氧化物层上形成硅层以形成键合的基片; 以及加热所述键合衬底以将掺杂剂从所述接合层驱动到所述第二衬底中,以在与所述接合层相邻的所述第二衬底中形成掺杂层。

    CMOS devices having reduced threshold voltage variations and methods of manufacture thereof
    2.
    发明授权
    CMOS devices having reduced threshold voltage variations and methods of manufacture thereof 失效
    具有降低的阈值电压变化的CMOS器件及其制造方法

    公开(公告)号:US07790542B2

    公开(公告)日:2010-09-07

    申请号:US12141314

    申请日:2008-06-18

    IPC分类号: H01L21/336

    摘要: Stress enhanced transistor devices and methods of fabricating the same are provided. In one embodiment, a transistor device comprises: a gate conductor disposed above a semiconductor substrate between a pair of dielectric spacers, wherein the semiconductor substrate comprises a channel region underneath the gate conductor and recessed regions on opposite sides of the channel region, wherein the recessed regions undercut the dielectric spacers to form undercut areas of the channel region; and epitaxial source and drain regions disposed in the recessed regions of the semiconductor substrate and extending laterally underneath the dielectric spacers into the undercut areas of the channel region.

    摘要翻译: 提供了应力增强型晶体管器件及其制造方法。 在一个实施例中,晶体管器件包括:栅极导体,设置在一对电介质间隔物之间​​的半导体衬底之上,其中半导体衬底包括位于栅极导体下方的沟道区域和沟道区域相对侧上的凹陷区域, 区域覆盖电介质间隔物以形成通道区域的底切区域; 以及设置在半导体衬底的凹陷区域中的外延源极和漏极区域,并且在电介质间隔物的下方横向延伸到沟道区域的底切区域中。

    SILICON-ON-INSULATOR SUBSTRATE WITH BUILT-IN SUBSTRATE JUNCTION
    3.
    发明申请
    SILICON-ON-INSULATOR SUBSTRATE WITH BUILT-IN SUBSTRATE JUNCTION 有权
    具有内置衬底接合的绝缘体绝缘体衬底

    公开(公告)号:US20110049594A1

    公开(公告)日:2011-03-03

    申请号:US12551797

    申请日:2009-09-01

    摘要: A method of forming a SOI substrate, diodes in the SOI substrate and electronic devices in the SOI substrate and an electronic device formed using the SOI substrate. The method of forming the SOI substrate includes forming an oxide layer on a silicon first substrate; ion-implanting hydrogen through the oxide layer into the first substrate, to form a fracture zone in the substrate; forming a doped dielectric bonding layer on a silicon second substrate; bonding a top surface of the bonding layer to a top surface of the oxide layer; thinning the first substrate by thermal cleaving of the first substrate along the fracture zone to form a silicon layer on the oxide layer to formed a bonded substrate; and heating the bonded substrate to drive dopant from the bonding layer into the second substrate to form a doped layer in the second substrate adjacent to the bonding layer.

    摘要翻译: 形成SOI衬底的方法,SOI衬底中的二极管和SOI衬底中的电子器件以及使用SOI衬底形成的电子器件。 形成SOI衬底的方法包括在硅第一衬底上形成氧化物层; 将氢离子注入到氧化物层进入第一衬底中,以在衬底中形成断裂区; 在硅第二衬底上形成掺杂的电介质结合层; 将所述结合层的顶表面结合到所述氧化物层的顶表面; 通过沿着断裂区域热裂解第一基板来使第一基板变薄,以在氧化物层上形成硅层以形成键合的基片; 以及加热所述键合衬底以将掺杂剂从所述接合层驱动到所述第二衬底中,以在与所述接合层相邻的所述第二衬底中形成掺杂层。

    Silicon-on-insulator substrate with built-in substrate junction
    4.
    发明授权
    Silicon-on-insulator substrate with built-in substrate junction 有权
    具有内置衬底结的绝缘体上硅衬底

    公开(公告)号:US07955940B2

    公开(公告)日:2011-06-07

    申请号:US12551797

    申请日:2009-09-01

    IPC分类号: H01L21/331

    摘要: A method of forming a SOI substrate, diodes in the SOI substrate and electronic devices in the SOI substrate and an electronic device formed using the SOI substrate. The method of forming the SOI substrate includes forming an oxide layer on a silicon first substrate; ion-implanting hydrogen through the oxide layer into the first substrate, to form a fracture zone in the substrate; forming a doped dielectric bonding layer on a silicon second substrate; bonding a top surface of the bonding layer to a top surface of the oxide layer; thinning the first substrate by thermal cleaving of the first substrate along the fracture zone to form a silicon layer on the oxide layer to formed a bonded substrate; and heating the bonded substrate to drive dopant from the bonding layer into the second substrate to form a doped layer in the second substrate adjacent to the bonding layer.

    摘要翻译: 形成SOI衬底的方法,SOI衬底中的二极管和SOI衬底中的电子器件以及使用SOI衬底形成的电子器件。 形成SOI衬底的方法包括在硅第一衬底上形成氧化物层; 将氢离子注入到氧化物层进入第一衬底中,以在衬底中形成断裂区; 在硅第二衬底上形成掺杂的电介质结合层; 将所述结合层的顶表面结合到所述氧化物层的顶表面; 通过沿着断裂区域热裂解第一基板来使第一基板变薄,以在氧化物层上形成硅层以形成键合的基片; 以及加热所述键合衬底以将掺杂剂从所述接合层驱动到所述第二衬底中,以在与所述接合层相邻的所述第二衬底中形成掺杂层。

    Dual workfunction MOSFETs with borderless diffusion contacts for high-performance embedded DRAM technology
    5.
    发明授权
    Dual workfunction MOSFETs with borderless diffusion contacts for high-performance embedded DRAM technology 失效
    双功能MOSFET,具有无边界扩散触点,用于高性能嵌入式DRAM技术

    公开(公告)号:US06335248B1

    公开(公告)日:2002-01-01

    申请号:US09845665

    申请日:2001-04-30

    IPC分类号: H01L21336

    摘要: The present invention provides a method for forming dual workfunction metal oxide semiconductor field effect transistors (MOSFETs) which utilizes processing steps that solve the problem of doping the dual work function MOSFETs, while providing contacts to the diffusion regions which are borderless to the gate conductors. Specifically, the present invention provides a method wherein a self-aligned insulating gate cap is formed on top of a previously defined and doped gate conductor region. The inventive method which forms an insulating cap that is self-aligned to an underlying gate conductor enables the formation of dual workfunction gate conductors and borderless diffusion contacts without the need of employing separate block masks as required by prior art processes.

    摘要翻译: 本发明提供一种用于形成双功函数金属氧化物半导体场效应晶体管(MOSFET)的方法,其利用解决掺杂双功函数MOSFET的问题的处理步骤,同时向与栅极导体无边界的扩散区提供触点。 具体而言,本发明提供了一种方法,其中在对预定义和掺杂的栅极导体区域的顶部上形成自对准绝缘栅极帽。 形成与下面的栅极导体自对准的绝缘帽的本发明的方法使得能够形成双功能门极导体和无边界扩散接触,而不需要采用现有技术工艺所要求的单独的阻挡掩模。