High-speed system having compensation for distortion in a digital-to-analog converter
    1.
    发明授权
    High-speed system having compensation for distortion in a digital-to-analog converter 有权
    具有对数模转换器失真补偿的高速系统

    公开(公告)号:US08694569B2

    公开(公告)日:2014-04-08

    申请号:US12233422

    申请日:2008-09-18

    CPC classification number: H04L27/0002 H03M1/661 H03M1/662

    Abstract: A method and system for the design and implementation of an inverse-sinc function that can efficiently process signals produced by high-speed systems is presented. An integrated inverse-sinc module accepts multiple data streams that may result from parallel sub-systems and creates multiple outputs that can be interleaved to produce a sequence that has been filtered by an inverse-sinc function. The multiple-input, multiple-output system may be beneficially operated at a low data rate, such as the data rate used by each of the sub-systems.

    Abstract translation: 提出了一种用于设计和实现可以有效处理由高速系统产生的信号的反相函数的方法和系统。 集成的反sinc模块接受可能由并行子系统产生的多个数据流,并创建可以进行交织的多个输出,以产生已被反向sinc函数过滤的序列。 多输入多输出系统可以以低数据速率有利地操作,诸如由每个子系统使用的数据速率。

    High-Speed System Having Compensation for Distortion in a Digital to-Analog Converter
    2.
    发明申请
    High-Speed System Having Compensation for Distortion in a Digital to-Analog Converter 有权
    具有数模转换器失真补偿的高速系统

    公开(公告)号:US20090075595A1

    公开(公告)日:2009-03-19

    申请号:US12233422

    申请日:2008-09-18

    CPC classification number: H04L27/0002 H03M1/661 H03M1/662

    Abstract: A method and system for the design and implementation of an inverse-sinc function that can efficiently process signals produced by high-speed systems is presented. An integrated inverse-sinc module accepts multiple data streams that may result from parallel sub-systems and creates multiple outputs that can be interleaved to produce a sequence that has been filtered by an inverse-sinc function. The multiple-input, multiple-output system may be beneficially operated at a low data rate, such as the data rate used by each of the sub-systems.

    Abstract translation: 提出了一种用于设计和实现可以有效处理由高速系统产生的信号的反相函数的方法和系统。 集成的反sinc模块接受可能由并行子系统产生的多个数据流,并创建可以进行交织的多个输出,以产生已被反向sinc函数过滤的序列。 多输入多输出系统可以以低数据速率有利地操作,诸如由每个子系统使用的数据速率。

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