Real-time DC-balance aware AFE offset cancellation

    公开(公告)号:US11881969B2

    公开(公告)日:2024-01-23

    申请号:US17885001

    申请日:2022-08-10

    摘要: A receiver for a serial data link, including an analog front end (AFE) including a continuous-time linear equalizer (CTLE) configured to receive an input signal from a transmitter, the CTLE including a first output node; a second output node; a plurality of programmable tail current sources configured to adjust a direct current (DC) offset between the first output node and the second output node; and a calibration circuit including: a slicer configured to output a difference between a first average output voltage corresponding to the first output node and a second average output, voltage corresponding to the second output node; and a calibration counter configured to increment or decrement an offset count based on the difference, wherein the plurality of programmable tail current sources are adjusted based on a value of the offset count.

    REAL-TIME DC-BALANCE AWARE AFE OFFSET CANCELLATION

    公开(公告)号:US20230344681A1

    公开(公告)日:2023-10-26

    申请号:US17885001

    申请日:2022-08-10

    摘要: A receiver for a serial data link, including an analog front end (AFE) including a continuous-time linear equalizer (CTLE) configured to receive an input signal from a transmitter, the CTLE including a first output node; a second output node; a plurality of programmable tail current sources configured to adjust a direct current (DC) offset between the first output node and the second output node; and a calibration circuit including: a slicer configured to output a difference between a first average output voltage corresponding to the first output node and a second average output, voltage corresponding to the second output node; and a calibration counter configured to increment or decrement an offset count based on the difference, wherein the plurality of programmable tail current sources are adjusted based on a value of the offset count.

    Baseband data reduction and compression algorithm

    公开(公告)号:US11683205B2

    公开(公告)日:2023-06-20

    申请号:US17380772

    申请日:2021-07-20

    申请人: RAYTHEON COMPANY

    IPC分类号: H04L25/49 H04L27/00

    摘要: A system and method for recovering encoded data from a modulated baseband signal is disclosed. Aspects and embodiments of the system and method include receiving an analog input signal representing a modulated baseband signal, counting clock cycles of a reference clock, detecting a first transition and a second transition of the analog input signal indicating a first change and a second change in the modulated baseband signal, storing a first counter value corresponding to an amount of clock cycles elapsed between the first transition and the second transition, and determining a binary-valued bit sequence corresponding to the first counter value.

    APPARATUS AND METHOD FOR IDENTIFYING COMMUNICATIONS SIGNAL IN PRECEDING STAGE FOR COMMUNICATIONS MODEM

    公开(公告)号:US20190199561A1

    公开(公告)日:2019-06-27

    申请号:US16047292

    申请日:2018-07-27

    IPC分类号: H04L27/00 H04L29/06 H04L1/20

    摘要: An apparatus for identifying a communications signal in a preceding stage for a communications modem includes a communications signal identifying unit configured to receive a communications signal through a port, deliver data included in the communications signal to a communications modem, and sample the communications signal which has passed through the port during every unit length to detect a unit length pattern corresponding to a start of communication and a unit length pattern corresponding to an end of communication. When a length from the start of communication to the end of communication is equal to or smaller than a reference length, the communications signal identifying unit delivers a data process stopping signal to the communications modem such that the communications modem stops a data reading operation.

    INTER-BAND DISTORTION AND INTERFERENCE MITIGATION WITHIN COMMUNICATION SYSTEMS

    公开(公告)号:US20190103930A1

    公开(公告)日:2019-04-04

    申请号:US15720437

    申请日:2017-09-29

    IPC分类号: H04J11/00

    摘要: A wireless communication device includes one or more transmitter (TX)-receiver (RX) pairs, one or more RX distortion estimators, and a combiner. A first RX distortion estimator receives a first TX signal corresponding to a first TX of the first TX-RX pair and a second TX signal corresponding to a second TX of a second TX-RX pair. The first RX distortion estimator processes the first TX signal and the second TX signal based on a first base function set including at least one base function to generate a first distortion signal set including at least one distortion signal. Then, the first RX distortion estimator processes the first distortion signal set to generate a first RX correction signal. The wireless communication device's combiner generates a first distortion compensated RX signal by compensating for distortion in a first RX signal of the first TX-RX pair based on the first RX correction signal.