公开(公告)号：US20170032741A1

公开(公告)日：2017-02-02

申请号：US15220713

申请日：2016-07-27

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE ,  University-Industry Cooperation Group of Kyung Hee Univ

发明人： Chunwon BYUN ,  Jong-Heon YANG ,  Sung-Min YOON ,  Kyoung Ik CHO ,  Chi-Sun HWANG

IPC分类号： G09G3/3266

CPC分类号： G09G3/3266 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2330/021 ,  G09G2330/028

摘要： Provided is a gate driving circuit. The gate driving circuit includes an ith modulation circuit and an ith line selection circuit (where i is a natural number greater than 1). The ith modulation circuit outputs an ith modulation voltage to an ith line selection circuit based on received first to third control signals. The ith line selection circuit includes a memory transistor that is turned on or turned off according to a level of the received ith modulation voltage.

摘要翻译： 提供了栅极驱动电路。 栅极驱动电路包括第i个调制电路和第i行选择电路（其中i是大于1的自然数）。 第i个调制电路基于接收的第一至第三控制信号将第i个调制电压输出到第i行选择电路。 第i行选择电路包括根据接收到的第i个调制电压的电平而导通或截止的存储晶体管。

公开(公告)号：US10008155B2

公开(公告)日：2018-06-26

申请号：US15220713

申请日：2016-07-27

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE ,  University-Industry Cooperation Group of Kyung Hee Univ

发明人： Chunwon Byun ,  Jong-Heon Yang ,  Sung-Min Yoon ,  Kyoung Ik Cho ,  Chi-Sun Hwang

IPC分类号： G09G3/12 ,  G09G3/3266 ,  G09G3/3233

CPC分类号： G09G3/3266 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/0289 ,  G09G2310/0291 ,  G09G2330/021 ,  G09G2330/028

摘要： Provided is a gate driving circuit. The gate driving circuit includes an ith modulation circuit and an ith line selection circuit (where i is a natural number greater than 1). The ith modulation circuit outputs an ith modulation voltage to an ith line selection circuit based on received first to third control signals. The ith line selection circuit includes a memory transistor that is turned on or turned off according to a level of the received ith modulation voltage.