公开(公告)号：US09712171B2

公开(公告)日：2017-07-18

申请号：US14129527

申请日：2013-09-11

申请人： Dmitri E. Nikonov ,  Sasikanth Manipatruni ,  Ian A. Young ,  Vehbi Calayir

发明人： Dmitri E. Nikonov ,  Sasikanth Manipatruni ,  Ian A. Young ,  Vehbi Calayir

IPC分类号： H03K19/16 ,  G06F7/501 ,  H03K19/20 ,  B82Y25/00 ,  H03K3/45

CPC分类号： H03K19/16 ,  B82Y25/00 ,  G06F7/501 ,  G11C11/161 ,  H03K3/45 ,  H03K19/20

摘要： Described is a latch comprising: a first all-spin logic (ASL) device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a clock signal; and a third ASL device coupled to the second ASL device, wherein the first and third ASL devices have respective magnets coupled to a power supply terminal. Described is a flip-flop which comprises: a first ASL device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a first clock signal; a third ASL device coupled to the second ASL device, the third ASL device controllable by a second clock signal, the second clock signal being out of phase relative to the first clock signal; and a fourth ASL device coupled to the third ASL device, wherein the first and fourth ASL devices have respective magnets coupled to a power supply terminal.

公开(公告)号：US20160248427A1

公开(公告)日：2016-08-25

申请号：US14129527

申请日：2013-09-11

申请人： Dmitri E. NIKONOV ,  Sasikanth MANIPATRUNI ,  Ian A. YOUNG ,  Vehbi CALAYIR

发明人： Dmitri E. NIKONOV ,  Sasikanth MANIPATRUNI ,  Ian A. YOUNG ,  Vehbi CALAYIR

IPC分类号： H03K19/16 ,  G06F7/501 ,  H03K19/20

CPC分类号： H03K19/16 ,  B82Y25/00 ,  G06F7/501 ,  G11C11/161 ,  H03K3/45 ,  H03K19/20

摘要： Described is a latch comprising: a first all-spin logic (ASL) device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a clock signal; and a third ASL device coupled to the second ASL device, wherein the first and third ASL devices have respective magnets coupled to a power supply terminal. Described is a flip-flop which comprises: a first ASL device; a second ASL device coupled to the first ASL device, the second ASL device controllable by a first clock signal; a third ASL device coupled to the second ASL device, the third ASL device controllable by a second clock signal, the second clock signal being out of phase relative to the first clock signal; and a fourth ASL device coupled to the third ASL device, wherein the first and fourth ASL devices have respective magnets coupled to a power supply terminal.

摘要翻译： 描述了一种锁存器，包括：第一全自旋逻辑（ASL）装置; 耦合到所述第一ASL设备的第二ASL设备，所述第二ASL设备可由时钟信号控制; 以及耦合到所述第二ASL装置的第三ASL装置，其中所述第一和第三ASL装置具有耦合到电源端子的相应磁体。 描述了一种触发器，其包括：第一ASL装置; 耦合到所述第一ASL设备的第二ASL设备，所述第二ASL设备可由第一时钟信号控制; 耦合到所述第二ASL装置的第三ASL装置，所述第三ASL装置可由第二时钟信号控制，所述第二时钟信号相对于所述第一时钟信号异相; 以及耦合到所述第三ASL装置的第四ASL装置，其中所述第一和第四ASL装置具有耦合到电源端子的相应磁体。