Method and system for multilevel serializer/deserializer
    1.
    发明授权
    Method and system for multilevel serializer/deserializer 失效
    多级串行器/解串器的方法和系统

    公开(公告)号:US07342520B1

    公开(公告)日:2008-03-11

    申请号:US10754463

    申请日:2004-01-08

    IPC分类号: H03M9/00

    摘要: A serial bit transparent data transferring technique eliminating the bit ambiguity problem of the standard time-division multiplexing/demultiplexing architecture without introduction of any extra latency. A serializer multiplexer converts input parallel data words into a serial data bit stream under control of a serializer timing circuit. An output multilevel buffer retimes the serialized data and increases the amplitude of certain bits with a preselected value to mark positions of out-going serial data words. The bits are defined by a serializer digital data converter also controlled by the same timing circuit. The imposed marking pulses are retrieved from the input serial data stream by a multilevel input detector of a deserializer timing circuit and used for the synchronization of the demultiplexing operation. As a result, the deserializer directly reconstructs the original bit order from the serial data bit stream with no extra bits, thus providing minimal possible latency and full data rate.

    摘要翻译: 一种串行位透明数据传输技术,消除了标准时分复用/解复用架构的位模糊度问题,而没有引入任何额外的延迟。 串行器复用器在串行器定时电路的控制下将输入并行数据字转换为串行数据位流。 输出多级缓冲器重新排列序列化数据,并以预选值增加某些位的幅度,以标记出现的串行数据字的位置。 这些位由也由相同定时电路控制的串行器数字数据转换器定义。 通过解串器定时电路的多电平输入检测器从输入串行数据流中检索施加的标记脉冲,并用于解复用操作的同步。 结果,解串器直接从串行数据比特流重建原始比特序列,没有额外的比特,从而提供最小的可能延迟和全数据速率。