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公开(公告)号:US06309912B1
公开(公告)日:2001-10-30
申请号:US09597215
申请日:2000-06-20
IPC分类号: H01L2144
CPC分类号: H01L23/5389 , H01L21/52 , H01L23/13 , H01L24/24 , H01L24/25 , H01L24/29 , H01L24/82 , H01L24/83 , H01L2224/24225 , H01L2224/24227 , H01L2224/2919 , H01L2224/32225 , H01L2224/73267 , H01L2224/8319 , H01L2224/83855 , H01L2224/92244 , H01L2924/01006 , H01L2924/01011 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15173 , H01L2924/30105 , H01L2924/30107 , H01L2924/00
摘要: A method of interconnecting electrical terminations (12) of an integrated circuit die (30) to corresponding circuit traces (22) of a circuit carrying substrate (20). The die is placed in a cavity (24) in the substrate such that the electrical terminations on the die are aligned with corresponding circuit traces on the substrate, and so that the surfaces of the die and substrate are coplanar. A film (40) is vacuum laminated over the substrate and the die with heat and pressure. The film is then heated so that it flows to fill the spaces (34) between the die and sidewalls of the cavity, and is then cured. Excess film is then removed everywhere except that which is in the space between the die and the cavity walls. Electrical interconnections (100) are then plated up between the terminations and the circuit traces to bridge the distance between the terminations and the circuit traces. These interconnections are plated directly on the surface of those portions of the laminated film that lie between the sides of the die and of the cavity.
摘要翻译: 将集成电路管芯(30)的电气端子(12)与电路承载衬底(20)的对应电路迹线(22)互连的方法。 将模具放置在基板中的空腔(24)中,使得管芯上的电端子与基板上的相应电路迹线对准,并且使得管芯和基板的表面是共面的。 将薄膜(40)在热和压力下真空层压在基板和模具上。 然后将膜加热,使其流动以填充模具和空腔的侧壁之间的空间(34),然后固化。 然后除了在模具和腔壁之间的空间中除去多余的膜。 然后将电互连(100)电镀在终端和电路迹线之间,以桥接终端和电路迹线之间的距离。 这些互连件直接镀在位于模具的侧面和空腔之间的层压膜的那些部分的表面上。