Phase-locked loop circuit
    1.
    发明授权
    Phase-locked loop circuit 失效
    锁相环电路

    公开(公告)号:US4686689A

    公开(公告)日:1987-08-11

    申请号:US890426

    申请日:1986-07-24

    申请人: William L. Rorden

    发明人: William L. Rorden

    摘要: A phase-locked loop circuit receives an input signal that has a predetermined frequency during a succession of symbol intervals and of which the phase during a given symbol interval is related to the phase during a reference interval by the angle 2n.pi./N, where N is a positive integer and n is an integer in the range from 0 to (N-1), and generates a reference signal of which the phase has a desired relationship to the phase of the input signal during the reference interval. The circuit comprises a controllable oscillator that is responsive to a control signal to generate the reference signal, the frequency of the reference signal being equal to the predetermined frequency when the value of the control signal is zero. The circuit also comprises a demodulator for generating a first signal representative of the sine of the phase of the input signal relative to the reference signal and for generating a second signal representative of the cosine of the phase of the input signal relative to the reference signal, and a function generator for receiving the first and second signals and generating the control signal such that when the phase of the input signal relative to the reference signal is equal to 2n.pi./N plus the phase of the input signal relative to the reference signal during the reference interval, the value of the control signal is zero and the first derivative of the value of the control signal with respect to phase of the input signal relative to the reference signal is positive.

    摘要翻译: 锁相环电路在连续符号间隔期间接收具有预定频率的输入信号,并且其中给定符号间隔期间的相位与参考间隔期间的相位相关角度为2n pi / N,其中N 是正整数,n是从0到(N-1)的范围内的整数,并且在参考间隔期间产生相位与输入信号的相位具有期望关系的参考信号。 电路包括可控振荡器,其响应于控制信号以产生参考信号,当控制信号的值为零时,参考信号的频率等于预定频率。 电路还包括解调器,用于产生表示输入信号的相位相对于参考信号的正弦的第一信号,并且用于产生表示相对于参考信号的输入信号的相位余弦的第二信号, 以及功能发生器,用于接收第一和第二信号并产生控制信号,使得当输入信号相对于参考信号的相位相对于参考信号相对于参考信号的相位等于2n pi / N加上相对于参考信号的相位时 参考间隔,控制信号的值为零,并且控制信号的值相对于参考信号相对于输入信号的相位的一阶导数为正。

    Noise eliminator for television synchronizing signal separating circuits
    2.
    发明授权
    Noise eliminator for television synchronizing signal separating circuits 失效
    电视同步信号分离电路的消噪器

    公开(公告)号:US4254435A

    公开(公告)日:1981-03-03

    申请号:US28306

    申请日:1979-04-30

    IPC分类号: H04N5/08 H04N5/18 H04N5/213

    CPC分类号: H04N5/213

    摘要: A circuit for reducing the effects of negative-going impulse noise in composite television video signals has on sync separators is disclosed. A variable output current source is used to supply rundown current to a dc restorer in a sync separator. A retriggerable monostable multivibrator is triggered by negative-going impulse spikes in the composite video signal. The output of this multivibrator is coupled to the current source to increase its output and therefore decrease the time required for the dc restorer to recover from the negative spike.

    摘要翻译: 公开了一种用于减少复合电视视频信号中负向脉冲噪声的影响的电路。 可变输出电流源用于向同步分离器中的直流恢复器提供欠压电流。 可再触发单稳态多谐振荡器由复合视频信号中的负向脉冲尖峰触发。 该多谐振荡器的输出耦合到电流源以增加其输出,从而减少直流恢复器从负尖峰恢复所需的时间。

    Differential amplifier having high common-mode rejection ratio
    3.
    发明授权
    Differential amplifier having high common-mode rejection ratio 失效
    差分放大器具有高共模抑制比

    公开(公告)号:US4525677A

    公开(公告)日:1985-06-25

    申请号:US540988

    申请日:1983-10-12

    申请人: William L. Rorden

    发明人: William L. Rorden

    IPC分类号: H03F3/68 H03F3/45

    CPC分类号: H03F3/45479

    摘要: A differential input receiver having normal and common mode impedance balanced inputs and a common mode rejection ratio approaching infinity is provided. The receiver includes a differential input operational amplifier across which is connected a fixed gain inverting amplifier. The fixed gain, inverting amplifier being connected in a feedback configuration across the differential input amplifier. Additionally, the values and ratios of the various resistors being selected to provide the balanced differential input and the substantially zero common mode gain of the receiver.

    摘要翻译: 提供了具有正常和共模阻抗平衡输入和接近无限远的共模抑制比的差分输入接收机。 接收器包括一个差分输入运算放大器,连接有一个固定增益反相放大器。 固定增益反相放大器以差分输入放大器的反馈配置连接。 此外,选择各种电阻器的值和比率以提供平衡差分输入和接收器的基本为零的共模增益。